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点积加速器的设计与实现
引用本文:濮琼,黄建华. 点积加速器的设计与实现[J]. 微电子学与计算机, 2007, 24(2): 147-149
作者姓名:濮琼  黄建华
作者单位:信息工程大学,理学院,河南,郑州,450000
基金项目:国家高技术研究发展计划(863计划)
摘    要:提出了GF(2m)上的椭圆曲线点积加速器的一种有效的硬件设计,针对不同有限域GF(2m)及其上的椭圆曲线的特点,设计出较优的专用电路。此外,在控制器的设计中提出了一种新的方法—有限状态机的分解与合成,该方法灵活有效,且设计简单,尤其适合设计步进式状态机。最后,用Verilog HDL在FPGA上编程实现了GF(2193)上的点积加速器,计算一次点积仅需0.125ms,且通过重配置,可实现任何一个GF(2m)上的点积算术功能。

关 键 词:椭圆曲线密码  硬件设计  有限状态机
文章编号:1000-7180(2007)02-0147-03
修稿时间:2005-12-20

Design and Implementation of an Accelerator for Point Multiplication
PU Qiong,HUANG Jian-hua. Design and Implementation of an Accelerator for Point Multiplication[J]. Microelectronics & Computer, 2007, 24(2): 147-149
Authors:PU Qiong  HUANG Jian-hua
Affiliation:Institute of Science, information Engineering University, Zhengzhou 450000, China
Abstract:This paper proposes an efficient hardware architecture to speed up computing point multiplication for elliptic curves cryptosystem over fields GF(2m),which mostly exploits the features of such elliptic curves and finite fields to deliver optimized special circuits for them.Moreover,we present a new and efficient method suit to design stepwise controller just like those in this paper,which is called the decomposition and composition of a finite state machine.As a typical example,in Verilog HDL,we implement on FPGA the accelerator for elliptic curves over the field GF(2193),one of fields GF(2m) which can be supported respectively after reconfiguration.The results show that our implementations can compute elliptic curve scalar multiplications with arbitrary points in 0.125ms in the field GF(2193).
Keywords:ECC  Hardware design  Automation
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