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BMC via on-the-fly determinization
Authors:Toni Jussila  Keijo Heljanko  Ilkka Niemelä
Affiliation:1. Laboratory for Theoretical Computer Science, Helsinki University of Technology, 5400, 02015 TKK, Finland
Abstract:This paper develops novel bounded model checking (BMC) techniques for asynchronous parallel systems. The aim is to increase the efficiency of BMC by exploiting the inherent concurrency in such systems. This added efficiency is gained by covering more reachable states within a given bound using two techniques. Firstly, a nonstandard execution model, step executions, where multiple actions can take place simultaneously is applied. Secondly, the number of executions the system can have is reduced by modeling the execution of the system components as if they were determinized. This determinization technique also enables the removal of the internal transitions of the components. Step executions can be further restricted to a subclass called process executions without losing any reachable states.The paper presents a translation scheme for BMC of reachability properties. The translation is from an asynchronous system where the components are modeled as labeled transition systems (LTSs) to a propositional formula. The models of the formula correspond to the step executions of the original system where each component is replaced with its determinized counterpart. The formula for step executions can be easily extended in such a way that its models correspond to the process executions of the system. The translation scheme has been implemented and some experimental comparisons performed. The results show that the bound needed to detect a violation of a reachability property is, for step and process executions, in most cases lower than in interleaving executions and that the running time of the model checker using process executions is smaller than of that using steps. Moreover, the performance compares favorably to a state-of-the-art interleaving BMC implementation in the NuSMV system.
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