Ultra-low-power variable-resolution successive approximation ADC for biomedical application

An ultra-low-power variable-resolution successive approximation analogue-to-digital converter (ADC) is presented. A novel binary search algorithm architecture is proposed to replace the conventional digital-to-analogue converter to significantly reduce system area and power consumption. The proposed ADC consumes less than 22.2 /spl mu/W of power at a conventional 2 V battery supply with a sampling rate of 200 samples/s, and standby power consumption of less than 1 /spl mu/W.