High-performance InGaAs junction field-effect transistor with P/Beco-implanted gate |
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| Authors: | Wang K.-W. Cheng C.-L. Long J. Mitcham D. |
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| Affiliation: | AT&T Bell Lab., Murray Hill, NJ; |
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| Abstract: | InGaAs junction field-effect transistors (JFETs) are fabricated in metalorganic chemical-vapor-deposition (MOCVD)-grown n-InGaAs and semi-insulating Fe:InP layers on n+-InP substrate with a P/Be co-implanted p+ self-aligned gate. The device exhibits a transconductance of 245 mS/mm (intrinsic transconductance of 275 mS/mm) at zero gate bias and good pinch-off behavior for a gate length of 0.5 μm. The effective electron velocity is deduced to be 2.8×107 cm/s, equal to the theoretical prediction |
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