Crested barrier in the tunnel stack of non-volatile memories

In this work a high-k insulating film is deposited on the SiO₂ tunnel oxide of MOS capacitors designed for non-volatile memory applications. The advantages of this approach derive from the asymmetric band diagram, which lowers the Fowler–Nordheim tunnel erase barrier, without affecting the program operation. This results in lower erase voltage and much shorter erase times. In fact, in the proposed structure the erase voltage is about 20% lower and the erase current three thousands times greater than in conventional MOS with pure-SiO₂ tunnel oxide and the same equivalent oxide thickness (15 nm). At the same time, the larger physical thickness prevents from charge loss, and guarantees data retention. The goal of such device is to improve the memory performances without degrading reliability.