| 用VHDL语言设计数字系统实例 |
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| 引用本文： | 郭锋,刘凯. 用VHDL语言设计数字系统实例[J]. 微处理机, 2001, 0(3): 40-44 |
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| 作者姓名： | 郭锋 刘凯 |
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| 作者单位： | 1. 浙江万里学院电信系
2. 西安电子科技大学研究生院 |
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| 摘 要： | 以微控制器（M68HC05）为例，说明采用硬件描述语言进行数字系统设计的方法。这一过程主要包括：体系结构的确立、状态机的抽取、行为模型的建立与模拟、结构模型的建立与模拟以及可编程器件的实现。采用两级建模和模拟技术可提高系统的实现效率并降低出错可能性，缩短开发周期。同时软件技术的引入为硬件开发带来了新方法。
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| 关 键 词： | 微控制器 硬件描述语言 可编程器件 数字系统 VHDL语言 设计 |
| 修稿时间： | 2000-12-20 |
An Example of Methodology of Digital System Design Using HDL |
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| Guo Feng,et al Zhejiang Wanli University,Ningbo. An Example of Methodology of Digital System Design Using HDL[J]. Microprocessors, 2001, 0(3): 40-44 |
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| Authors: | Guo Feng et al Zhejiang Wanli University Ningbo |
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| Affiliation: | Guo Feng,et al Zhejiang Wanli University,Ningbo 315100 |
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| Abstract: | In the paper,the design of microcontroller (M68HC05) is taken as an example of methodology of digital system design using HDL.The whole design flow is mainly definition of system architecture,extraction of state machine, constitution and simulation of behavior model,constitution and simulation of structure model and programming of CPLD.The technology of two-level model and simulation improves efficiency of system and decreases probability of failure and period of development.Meanwhile,the introduction of software brings new method for hardware development. |
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| Keywords: | microcontroller HDL simulation CPLD |
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