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多相滤波数字信道化的FPGA实现
引用本文:侯,聪.多相滤波数字信道化的FPGA实现[J].电讯技术,2012,52(8):1345-1348.
作者姓名:  
作者单位:中国西南电子技术研究所,成都,610036
摘    要:以多相滤波为基础,结合均匀滤波器组,采用50%重叠的子信道划分,提出了一种数字信道化实现方法,解决了高速实时处理与FPGA处理速度之间的矛盾,克服了信道化接收机的接收盲区.基于FPGA,提出了短波宽带数字信道化的设计思路和实现方法.仿真结果表明,该设计有较强的实用性和通用性.

关 键 词:电子战接收机  多相滤波  数字信道化

FPGA realization of digital channel based on polyphase filters
HOU Cong.FPGA realization of digital channel based on polyphase filters[J].Telecommunication Engineering,2012,52(8):1345-1348.
Authors:HOU Cong
Affiliation:Southwest China Institute of Electronic Technology, Chengdu 610036, China
Abstract:Implementation of digital channelization is presented based on polyphase filters and s tructure of the uniform filters and 50% overlap of subchannels division. The contradiction between high-speed real-time processing and FPGA processing s peed is solved, and the blind spot of the channelized receiver is overcome. The idea and method for implementing HF broadband digital channelization based on FPGA is proposed. Simulation shows the design has strong practicality and vers atility.
Keywords:EW receiver  polyphase filters  digital channelization
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