一个新的MOS模拟单元电路版图的STACK生成方法

提出了一种新的MOS模拟单元电路的STACK版图自动生成方法。该方法将电路网表映射为扩散图，基于扩散图进行电路划分、模板匹配和对称查找。提出的对称查找算法适用于非全对称电路的最大匹配对称结构查找。文中改进了Atallah欧拉路径生成算法，通过增加哑元条保证欧拉路 径的生成。对生成的STACK，采用分布式寄生电容模型计算各个节点的寄生电容，并计算STACK的面积和形状，以确保其能够满足设计要求。

A Novel STACK Generation Technique for MOS Analog Cell Circuit Layout

This paper proposes a new technique to automatically generate STACK layout for MOS analog cell circuits. The circuit net list is first mapped into a diffusion graph. Based on the diffusion graph, circuit partition, pattern recognition and symmetry searching are carried out to generate sub graphs, each of which can be implemented by a STACK. The proposed symmetry searching algorithm can find the maximal symmetry structures in a none fully symmetric circuit. To guarantee the generation of a Eularian trail, the Atallah Eularian trail generation algorithm is improved by employing the dummy adding technique. In order to evaluate the performance of a generated STACK, a distributed parasitic capacitance model is applied to calculate the STACK node parasitic capacitance, as well as the calculation of STACK area and shape.