| 基于解析电导率模型的相变存储器SPICE模型 |
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| 引用本文： | 魏益群,林信南,贾宇超,崔小乐,何进,张兴. 基于解析电导率模型的相变存储器SPICE模型[J]. 半导体学报, 2012, 33(11): 114004-5 |
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| 作者姓名： | 魏益群 林信南 贾宇超 崔小乐 何进 张兴 |
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| 作者单位： | The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;Peking University Shenzhen SOC Key Laboratory, PKU-HKUST, Shenzhen-Hong Kong Institute, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;Key Laboratory of Microelectronic Devices and Circuits, Institute of Microelectronics, School of Electronics and Computer Science, Peking University, Beijing 100871, China |
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| 摘 要： | 在相变存储器的外围电路设计中，相变存储单元的电路模型是连接器件与电路的桥梁。在本文中，提出了一种基于解析电导率模型的相变存储器电路模型，与前面的工作相比，该模型利用解析电导率模型代替了使用传统模型中需要利用测试结果建模的缺点，可以通过材料的参数计算相变存储单元的电阻，能够反映相变材料中的载流子传输特性。同时，基于等温假设，提出了解析温度模型，并基于JMA方程建立的相变动力学模型，结果表明，该模型能够进行相变存储单元瞬态与稳态电路仿真，并与测试结果符合较好。
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| 关 键 词： | 相变存储器 模型分析 存储单元 SPICE模型 基础 Verilog-A 传导 外围电路 |
| 收稿时间： | 2012-04-17 |
| 修稿时间： | 2012-05-08 |
A SPICE model for a phase-change memory cell based on the analytical conductivity model |
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| Wei Yiqun,Lin Xinnan,Jia Yuchao,Cui Xiaole,He Jin and Zhang Xing. A SPICE model for a phase-change memory cell based on the analytical conductivity model[J]. Chinese Journal of Semiconductors, 2012, 33(11): 114004-5 |
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| Authors: | Wei Yiqun Lin Xinnan Jia Yuchao Cui Xiaole He Jin Zhang Xing |
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| Affiliation: | The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;Peking University Shenzhen SOC Key Laboratory, PKU-HKUST, Shenzhen-Hong Kong Institute, Shenzhen 518055, China;The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China;Key Laboratory of Microelectronic Devices and Circuits, Institute of Microelectronics, School of Electronics and Computer Science, Peking University, Beijing 100871, China |
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| Abstract: | By way of periphery circuit design of the phase-change memory, it is necessary to present an accurate compact model of a phase-change memory cell for the circuit simulation. Compared with the present model, the model presented in this work includes an analytical conductivity model, which is deduced by means of the carrier transport theory instead of the fitting model based on the measurement. In addition, this model includes an analytical temperature model based on the 1D heat-transfer equation and the phase-transition dynamic model based on the JMA equation to simulate the phase-change process. The above models for phase-change memory are integrated by using Verilog-A language, and results show that this model is able to simulate the I-V characteristics and the programming characteristics accurately. |
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| Keywords: | phase-change memory compact model analytical conductivity |
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