FPGA Implementation of a Power Amplifier Linearizer for an ETSI-SDR OFDM Transmitter |
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Authors: | Suranjana Julius Anh Dinh |
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Affiliation: | Department of Electrical and Computer Engineenng, University of Saskatchewan, Saskatoon, S7N 5A2, Canada |
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Abstract: | Most satellite digital radio (SDR) systems use orthogonal frequency-division multiplexing (OFDM) transmission, which means that variable envelope signals are distorted by the RF power amplifier (PA). It is customary to back off the input power to the PA to avoid the PA nonlinear region of operation. In this way, linearity can be achieved at the cost of power efficiency. Another attractive option is to use a linearizer, which compensates for the nonlinear effects of the PA. In this paper, an OFDM transmitter conforming to European Telecommunications Standard Institute SDR Technical Specifications 2007-2008 was designed and implemented on a low-cost field-programmable gate array (FPGA) platform. A weakly nonlinear PA, operating in the L-band SDR frequency, was used for signal transmission. An adaptive linearizer was designed and implemented on the same FPGA device using digital predistortion to correct the undesired effects of the PA on the transmitted signal. Test results show that spectral distortion can be suppressed between 6-9 dB using the designed linearizer when the PA is driven close to its saturation region. |
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Keywords: | power amplifier linearization digital predistortion ETSI-SDR OFDM FPGA |
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