| HINOC2.0系统中高速LDPC译码器结构设计 |
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| 引用本文： | 崔竞飞,何大治,徐胤,赵越.HINOC2.0系统中高速LDPC译码器结构设计[J].电视技术,2014,38(17). |
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| 作者姓名： | 崔竞飞 何大治 徐胤 赵越 |
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| 作者单位： | 1. 上海交通大学,上海,200240
2. 广播科学研究院,北京,100866 |
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| 摘 要： | 介绍了在第二代同轴电缆宽带接入技术HINOC2.0中信道编码LDPC码译码器的设计难点,针对方案中高吞吐量的难点,提出了几种译码器的硬件结构,并且给出每一种结构在满足吞吐量要求时的资源消耗。为译码器的硬件实现提供参考,并给出了硬件资源分析和仿真结果作为理论依据。
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| 关 键 词： | HINOC. 高吞吐量 LDPC 译码器结构 |
| 收稿时间： | 8/7/2014 12:00:00 AM |
| 修稿时间： | 8/7/2014 12:00:00 AM |
DESIGN OF A HIGH-THROUGHPUT LDPC DECODER IN HINOC2.0 |
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| cuijingfei,hedazhi,xuyin and zhaoyue.DESIGN OF A HIGH-THROUGHPUT LDPC DECODER IN HINOC2.0[J].Tv Engineering,2014,38(17). |
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| Authors: | cuijingfei hedazhi xuyin and zhaoyue |
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| Abstract: | The difficulties in the design of LDPC decoder which is adopted in HINOC2.0 system is introduced. According to its high-throughput requirement, several hardware structures are proposed with the resource consumption analysis of each structure. |
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| Keywords: | HINOC2 0 high-throughput LDPC decoder structure |
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