Low Voltage Micropower Log-Domain Filters |
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Authors: | Ezz I. El-Masry Jie Wu |
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Affiliation: | (1) Electrical and Computer Engineering Department, DalTech, Dalhousie University, P. O. Box 1000, Halifax, Nova Scotia, B3J 2X4, Canada |
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Abstract: | A design technique for low-voltage, micropower continuous-time filters implementing CMOS devices operating in weak inversion is presented. The basic building block is the CMOS log-domain integrator. The effects of the MOS device nonidealities on the integrator are investigated and verified by HSPICE simulations. A 5th-order Chebyshev lowpass ladder filter was designed and simulated. The filter operates with low supply voltage of 1.5 V to achieve a cutoff frequency tunable range of 100 Hz–100 kHz, and it has a power dissipation of 254 nW/pole at the cutoff frequency of 100 kHz. The filter was laid out using the 0.35-m mixed-mode polycide CMOS technology and occupies a die area of 0.04 mm2 without the i/o pads |
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Keywords: | low-voltage low-power log-domain CMOS filters current-mode translinear |
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