基于改进级联泰勒补偿的TIADC时间误差校准

本文提出了一种针对于高速高精度TIADC时间失配误差的改进级联泰勒补偿算法。利用线性近似原理来估计时间失配误差，再采用一种经过改进的级联泰勒补偿结构进行误差补偿。其中，误差补偿模块与误差估计模块一起构成反馈式校准结构，以便于能够对时间失配误差实时估计与校准。在MATLAB建立一个位数为16 bit,时钟采样频率为500 MHz的4通道TIADC系统时间失配误差校准模型进行仿真验证。实验结果表明，当输入信号频率在整个奈奎斯特频段内，经过3阶校准后，TIADC系统的SFDR平均提高56.2 dB,SNR平均提高55.6 dB。相比于传统的级联泰勒补偿结构，进一步缩小了硬件实现规模。

TIADC time error calibration based on improved cascade Taylor compensation

An improved cascaded Taylor compensation algorithm for the time mismatch error in high-speed high-precision TIADC is proposed. Specifically, the linear approximation principle is used to estimate the time mismatch error, then an improved cascaded Taylor compensation structure is used to compensate for error. The error compensation module and error estimation module together form a feedback calibration structure to enable real-time estimation and calibration of the time mismatch error. A 4-channel TIADC system with 16 bit and clock sampling frequency of 500 MHz is established in MATLAB for simulation and verification of the time mismatch error calibration model. The experimental results show that when the input signal frequency is in the whole Nyquist frequency band, and after the 3rd order calibration, the SFDR and SNR of the TIADC system are improved by 56.2 and 55.6 dB on average. Compared to the traditional cascaded Taylor compensation structure, the hardware implementation is further reduced in size.