The use of stabilized CMOS delay lines for the digitization ofshort time intervals |
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Authors: | Rahkonen TE Kostamovaara JT |
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Affiliation: | Dept. of Electr. Eng., Oulu Univ.; |
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Abstract: | The basic advantages and limitations of using integrated digital CMOS delay lines for the digitization of short time intervals are discussed. Accuracies of 6-7 b and single-shot resolutions from 0.1 to 10 ns are demonstrated to be realizable using fully integrated, tapped, and voltage-controlled CMOS delay lines as a time base for the measurement |
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