A Fully Integrated, Low Noise and Low Power BiCMOS Front-end Readout System for Capacitive Detectors |
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| Authors: | Chaoying-Christine Guo Philippe Schmitt Grzegorz Deptuch Yongcai-Yann Hu |
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| Affiliation: | (1) Institut de Recherches Subatomiques, IReS, 23 rue du Loess, 67037 Strasbourg Cedex, France;(2) Dep. of Electronics, University of Mining and Metallurgy, al. A. Mickiewicza 30, 30-059 Krakow, Poland;(3) Laboratoire d'Electronique et de Physique des Systèmes Instrumentaux, LEPSI IN2P3/ULP, 23 rue du Loess, 67037 Strasbourg Cedex, France |
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| Abstract: | Bipolar transistors are interesting for low noise front-end readout systems when high speed and low power consumption are required. This paper presents a fully integrated, low noise front-end design for the future Large Hadron Collider (LHC) experiments using the radiation hard SOI BiCMOS process. In the present prototype, the input-referred Equivalent Noise Charge (ENC) of 990 electrons (rms) for 12 pF detector capacitance with a shaping time of 25 ns and power consumption of 1.4 mW/channel has been measured. The gain of this front-end is 90 mV/MIP (Minimum Ionisation Particle: 1
fC) with non-linearity of less than 3% and linear input dynamic range is
MIP. These results are obtained at room temperature and before irradiation. The measurements after irradiations by high intensity pion beam with an integrated flux of
pions/cm2 are also presented in this paper. |
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| Keywords: | BiCMOS analog IC design low noise front-end electronics and noise optimization |
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