Parasitic energy barriers in SiGe HBTs

Parasitic energy barriers can easily be introduced during processing. Measurements and calculations of experimental n-p-n HBTs (heterojunction bipolar transistors) are presented, showing that a parasitic conduction-band barrier at the base-collector junction reduces the collector current and the cutoff frequency. A simple analytical model explains the f_T degradation, caused by the reduction of the collector current and a pileup of minority carriers in the base. With the model the effective height and width of the barrier can also be derived from the measured collector current enhancement factor I_C(SiGe)/I_C(Si)