| Abstract: | A CMOS frequency synthesizer block for multi‐band orthogonal frequency division multiplexing ultra‐wideband systems is proposed. The proposed frequency synthesizer adopts a double‐conversion architecture for simplicity and to mitigate spur suppression requirements for out‐of‐band interferers in 2.4 and 5 GHz bands. Moreover, the frequency synthesizer can consist of the fewest nonlinear components, such as divide‐by‐Ns and a mixer with the proposed frequency plan, leading to the generation of less spurs. To evaluate the feasibility of the proposed idea, the frequency synthesizer block is implemented in 0.18‐µm CMOS technology. The measured sideband suppression ratio is about 32 dBc, and the phase noise is ‐105 dBc/Hz at an offset of 1 MHz. The fabricated chip consumes 17.6 mA from a 1.8 V supply, and the die‐area including pads is 0.9 × 1.1 mm2. |
