级联H桥变换器多路PWM发生器的新型设计方法

随着多电平技术的发展,开关数量急剧增加。对于超过三电平的电路结构,现有的嵌入式处理器本身提供的PWM通道显然不够用,而CPLD具有I/O口多、设计灵活、规模大和速度快的优点,为此本文采用DSP+CPLD方式,设计了多电平变换器用脉冲发生器实现方案。本方案采用近似PWM产生方式,即第一级的PWM脉冲由DSP产生,其他各级的PWM控制脉冲通过对第一级的PWM脉冲进行分别移相即可得到。采用这种近似方法使载波移相控制可以方便地实现数字化,而且DSP的计算量不随单元级数的增多而增加。本文详细介绍了该方案实现方法和特点,并给出了部分实验结果。

A New Design of Multi-channel PWM Generator for Cascaded H-bridge Converter

With the development of multi-level technology, the number of switches in system increased quickly. For more than three-level structure of the circuit, the available PWM channel existing in embedded processor is is not enough, and the CPLD has the advantage of I/O amount, flexible design, large scale and quick speed . So this paper design a multi-level converter pulse generator based on DSP and CPLD. The program used similar PWM method, that is the first level of the PWM pulse generated by the DSP, the othe...