基于PC104和CPLD的高速/多通道数据采集系统的设计与实现

开发了基于PC104和CPLD的高速/多通道数据采集系统,该数据采集系统利用CPLD可编程逻辑器件的模块化设计思想和先入先出(FIFO)芯片作为缓冲存储器,解决了A/D转换器的采样速率和CPU的工作时钟频率不匹配的问题,避免了数据丢失和控制不便等问题,提高了CPU效率。该数据采集系统不但可以实现高速多通道模拟信号的采集,而且可以很方便地扩展模拟量的输入通道数。本系统在牵引动力国家重点实验室的液压伺服控制系统中获得了很好的应用效果。

Design and Implement of High Speed/Multi-Channel Data Acquisition System Based on PC104 and CPLD

In this paper a new high speed/multi-channel data acquisition system based on PC/104 and CPLD is developed,which uses the modularization design in CPLD and use the FIFO chips as buffer storage.It solves the problem that the sampling speed of A/ D is slower than the working clock frequency of CPU.It makes the circuit simple and easy controlling,increases the efficiency of CPU.This data Acquisition system not only implements the connection of multichannel high speed analog signals,but also expands the channels of analog signals expediently.This system make a good effect in the hydraulic servo control system in the traction power state key laboratory.