消息存储器网络接口设计在PCI总线上的实践与性能分析

根据研究结果表明，在网络并行计算系统中，消息传递的内容很少是栈（Sdtack)中的数据，而主要是堆（Heap)中的数据，根据这个定性分析以及定量统计结论，结合存储器技术的进展，在网络并行计算中的网络接口上引入消息存储器，使得网络并行计算中各个结点可以直接访问其他结点的消息存储器，本文给出在这种消息存储器网络接口在PCI总线中的实践，对比了采用完全ASIC设计的通用原始方案与在PCI总线上采用嵌入处理机的方案之间的差异，根据对比结果，得出采用嵌入处理机的方案可以在完成面样功能的情况下，获得更高的计算与通信的重叠性，所以本文修改了原始的MMNI设计方案，把消息队列的管理也交由嵌入处理机完成，最后本文给出一种性能分析的模型，给出了在PCI总线上消息存储器网络接口的具体性能数据。

PRACTICE AND PERFORMANCE ANALYSIS OF MESSAGE MEMORYNETWORK INTERFACE DESIGN BASED ON PCI BUS

According to the previous research result,a fact is revealed that the transferred data seldom come from the stack, but mainly from the heap in message passing. Considering the technical development in memory industry, the architecture setting the message memory in the network interface of NPC (network parallel computing )is proposed. In this architecture MMNI, a node of NPC can access the message memory in other nodes. This paper present an implementation of MMNI in PCI bus. By comparing the raw design of MMNI by pure ASIC and the new design by embedded processor, because in the new design, message manager operations are handled by the embedded processor, embeded processor can make more parallelism between computation and communication.