Scaling rules for SOI MOSFETs operating in the fully inverted mode

Two-dimensional device simulation was performed on silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect-transistors (MOSFETs) with various gate length L_g various top Si layer thickness t_Si and various buried oxide (BOX) layer thickness t_BOX. As a result, it was found that when t_BOX is large, short channel effect (SCE) cannot be suppressed in a fully depleted (FD) MOSFET only by the simple scaling rule maintaining the ratio of L_g to top Si layer t_Si more than four. It was also found that the scaling rule breaks down more seriously in a fully inverted (FI) MOSFET. It was confirmed that electric field from the drain region penetrates easily into thick BOX layer, which causes drain-induced barrier lowering (DIBL) at the top Si/BOX interface in deep sub-micron gates SOI MOSFETs. Consequently, it was concluded that the DIBL can be suppressed efficiently by reducing t_BOX even in a FI MOSFET.