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王文利 《现代表面贴装资讯》2009,(5):56-58
本文介绍无铅工艺焊接高温对元器件可靠性的影响,指出了无铅焊接高温对元器件耐温的挑战,介绍了IPC新标准的无铅器件耐温要求,分析了无铅焊接高温带来的元器件失效问题,如摫谆 、分层、裂纹等,以及焊接高温对器件内部连接的影响,讨论了通过实施元件热管理来解决无铅焊接高温中的热损伤与热失效的方法,对在无铅焊接工艺过程提高元器件的可靠性应用具有一定的指导意义。 相似文献
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针对国产陶封FP结构器件再流焊接工艺助焊剂残留导致功能失效问题,进行原因分析、故障复现,确认了失效机理。根据失效机理提出了两种改进方案,进行了环境试验验证,试验结果证明方案有效,对于提高该类产品的可靠性具有一定的参考价值。 相似文献
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变频空调控制器柜机主板在生产过程出现大量IPM炸裂失效,IPM炸失效同步自举二极管失效,位置不集中,对主板进行分析,确定是IPM自举电路升压二极管异常导致IPM炸裂失效,经过对大量失效二极管及全检异常二极管分析,分析研究结果表明:二极管因为晶圆设计工艺结构缺陷、焊接工艺问题,导致晶圆焊接时产生高温铜迁移,抗机械应力水平下降,在实际应用中又因为器件引脚跨距设计不合理导致器件受机械应力影响加深失效程度,最终出现过电击穿失效,经大量的方案分析验证最终确定可行的方案,有效解决二极管铜迁移失效.从器件本身提高器件的应用可靠性. 相似文献
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本文主要从焊接原理入手,对失效样品进行了分析,并提出了新的基板焊接工艺及流程,最后对此工艺按GJB2438附录E的要求进行了工艺鉴定. 相似文献
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针对某型号探测器组件上用的Al2O3蓝宝石滤光片与可伐冷头钎焊的成品率低、后期失效问题突出等问题展开研究,找到了影响滤光片焊接成品率的几个关键因素,并针对这些因素提出解决方案,并通过一系列环境试验验证其可靠性,大幅提升了宝石窗口密封焊接工艺成品率。 相似文献
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单片机的ESD EMP效应及加固技术研究 总被引:3,自引:0,他引:3
ESD EMP(静电放电产生的电磁脉冲)具有上升沿陡、频带宽和峰值大等特点,对电子系统具有很强的干扰和破坏作用。为研究ESD EMP对电子系统的影响,以单片机为实验对象,对单片机系统进行了ESD EMP辐照效应实验。实验表明,单片机系统在ESD EMP作用下,会出现10多种故障现象。文中在实验基础上研究了单片机加固技术。 相似文献
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The problem of a prediction interval for the number of failures of a system during a future time period knowing the failures observed during a time interval in the past is considered. It is assumed that the failures follow a Poisson process. Now, if the failures in both time intervals were known, they could be used to test the hypothesis that the two observations were generated by the same Poisson law. By appropriately inverting the inequalities for the critical region of the above test, it is possible to generate the prediction limits for the number of failures in one time interval by observing the failures in the other time interval, provided both observations are subject to the same Poisson law. 相似文献
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仲圯 《电信工程技术与标准化》2002,(6):73-77
近来,我国安全事故不断发生,中央领导极为重视,在安全事故中,地质滑坡,房屋倒塌是一个主要部分,建筑工程发生质量事故,有属于管理及设计,施工等方面的原因,对于设计方面的原因,除了设计及计算错误外,有些是技术上值得深入研究的问题,为吸取经验,防止质量事故发生,本拟结合国内重大工程事故以及若干邮电通信建筑工程质量事故进行分析,以提高设计质量,促进技术水平的发展。 相似文献
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The electromigration cumulative percent lifetime probability of dual Damascene Cu/SiLK interconnects was fitted using three, individual lognormal functions where the functional populations were grouped by void growth location determined from focused ion beam failure analysis of all 54 of the stressed structures. The early, first mode failures were characterized by small voids in the bottom of the vias. The intermediate mode failures had voids in the line and via bottom while the late mode failures had voids that formed in the line only. The three, individual lognormal functions provided good fits of the data. Failure mode population separation using comprehensive failure analysis suggested that only the first mode failures should be used in the prediction of the chip design current. 相似文献
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We classify system failures into three categories: hardware failures, software failures, and hardware-software interaction failures. We develop a unified reliability model that accounts for failures in all three categories. Hardware, and software failures are accounted for with well-known modeling approaches. In this paper, we propose a modeling methodology using Markov processes to capture hardware-software interaction failures. We illustrate the combined hardware & software modeling approach by applying it to a real telecommunication system 相似文献
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Andrew H. Olney 《Microelectronics Reliability》1998,38(1):1029
Of 30 bipolar, BiCMOS, and CMOS monolithic, integrated circuit products that were ESD classified to the socketed Charged Device Model (CDM), 27 had ≥500 V withstand voltages and experienced no real-world CDM failures. Two of the three focus products with < 500 V withstand voltages initially had numerous manufacturing-induced CDM failures. Analysis of these two products showed that both socketed and non-socketed CDM testing induced damage at the same failure sites as identified on real-world CDM failures. However, only non-socketed CDM testing consistently reproduced the subtle damage observed on the real-world failures. On one of the focus products, the more severe damage induced by socketed CDM testing resulted in an open circuit rather than the resistive short that occurred on both the non-socketed and real-world CDM failures.Once the physics of CDM failure on the three focus products were fully understood, the ESD redesigns were relatively straightforward. On all three products, diffused series resistors and/or clamping devices with fast response times were added to the pins with inadequate CDM robustness. For each product, these redesigns boosted the socketed CDM withstand voltages for the previously susceptible pins to ≥1500 V and eliminated real-world CDM failures.Based on this work, a combined socketed and non-socketed CDM test approach is proposed for classifying/evaluating products and driving CDM robustness improvements. Guidelines for CDM testing and CDM improvement programs are also provided. 相似文献