罗兰C前端数字带通滤波器设计与实现

分析了罗兰C信号的特征,并根据信号特征决定选用FIR滤波器,利用MATLAB工具设计了满足滤波要求的高阶数字带通滤波器。详细研究了分布式算法的原理和分布式算法在FPGA上实现FIR数字滤波器的方法。最终采用改进的分布式算法在FPGA上实现了127阶FIR数字带通滤波器。利用实际采集的信号进行仿真和现场测试,结果均显示由该方法设计的滤波器性能良好,方法简单易行,相对于传统的乘累加结构不仅能节省硬件资源,而且可以改善数据处理速度,具有一定的推广价值。     

利用改进DA算法FIR滤波器的仿真与实现

针对传统乘法运算在FPGA中占用大量硬件资源的弊端,根据FIR滤波器的线性特性,对串行、并行和改进的分布式算法进行研究,利用改进分布式算法在FPGA上对FIR滤波器进行设计,通过查表法完成FIR滤波器的设计,用改进分布式算法设计了16阶FIR滤波器,并在Quartus II 7.0下进行仿真,仿真结果表明,与传统方法相比,该方法能够有效减少硬件资源的使用。     

一种200MHz处理速度的FIR滤波器设计

本文通过对串行分布式算法和并行分布式算法作对比研究,分析了基于并行分布式算法的FIR滤波器速度上的优势,设计出一种新颖的高速并行分布式算法结构,并根据该算法结构实现了一种满足处理速度200MHz,12位31阶FIR数字低通滤波器。     

基于分布式算法的高阶FIR滤波器及其FPGA实现

提出一种新的高阶FIR滤波器的FPGA实现方法。该方法运用多相分解结构对高阶FIR滤波器进行降阶处理,采用改进的分布式算法来实现降阶后的FIR滤波器。设计了一系列阶数从8到1 024的FIR滤波器,通过Quartus II 7.1的综合与仿真,以及在EP2S60F1020C4 FPGA目标器件上的实现结果表明,该方法能够有效地减少硬件资源的使用且满足高速实时性的要求。     

基于MA型分布式算法的高阶FIR滤波器设计及其FPGA实现

针对利用现有分布式算法在FPGA上实现高阶FIR滤波器时,存在资源消耗量过大和运行速度慢等问题,提出一种新型高阶FIR滤波器的FPGA实现方法。首先综合采用多相分解结构、流水线等技术对高阶FIR滤波器进行降阶处理,然后采用提出的基于二输入开关和加法器对的分布式算法结构(MA型DA结构)实现降阶后的FIR滤波器。利用ISE10.1在Xilinx Xc2vp30 7ff896 FPGA开发板上实现了一系列8阶到256阶的串行和并行结构FIR滤波器。实验结果表明,该方法有效地减少了系统的资源消耗,提高了系统的时序性能。     

基于可重构乘法器的FIR数字滤波器设计

讨论了一种新的乘法器结构(ReMB),并把它应用于数字FIR滤波器的设计中。在设计中,基于ReMB结构,通过改进RAG-n算法,简化FIR滤波器乘法模块的结构,减少硬件实现面积,提高速度。设计的32阶半带FIR滤波器用Verilog硬件描述语言进行描述,并综合到Xilinx公司Virtex-II系列FPGA中。从综合结果来看,提出的FIR结构可以达到面积和速度的优化。     

一种用于数字下变频的高阶分布式FIR滤波器及FPGA实现

设计了一种用于数字下变频的256阶分布式FIR滤波器.通过分析分布式FIR滤器结构给实现电路所需资源和运算速度带来的影响,确定了适用于Cyclone Ⅲ系列FPGA的实现结构.在Cyclone Ⅲ系列EP3C40F484C6N芯片上实现该算法并分析了资源消耗与电路速度.     

基于改进分布式算法的FIR滤波器设计

分布式算法(DA)具有节约硬件资源的优势,被广泛地应用于FIR滤波器设计中。提出一种改进的分布式算法,通过FPGA实现了一个32抽头的FIR低通滤波器,对ModelSim的仿真结果进行了分析,验证了该算法的可行性。结果表明改进的分布式算法比传统分布式算法显著降低了逻辑单元和存储资源的占用。     

基于FPGA的改进型FIR滤波器的实现

利用分布式算法对FIR滤波器的硬件实现进行了探讨,在数乘累加的理论上,对分布式算法的串行、并行和拆分查找表法的FPGA硬件实现方法进行了研究。结合FPGA查找表结构,兼顾资源及运行速度的要求,用拆分查找表的方法设计了16阶8位常系数FIR滤波器,并在Quartus Ⅱ 5.0下进行仿真,仿真结果验证了该算法的有效性和实时性。     

FIR滤波器的FPGA实现及其仿真研究

本文提出了一种采用现场可编程门阵列器件FPGA实现FIR字滤波器硬件电路的方案,该方案基于只读存储器ROM查找表的分布式算法。并以一个十六阶低通FIR数字滤波电路在ALTERA公司的CYCLONE系列FPGA芯片上的实现为例说明了设计过程。所设计电路通过软件验证和硬件仿真,结果表明电路工作正确可靠,满足设计要求,性能优于用DSP和传统方法实现的FIR滤波器。     

一种SDA数字滤波器的低功耗设计

SDA（Serial Distributed Arithmetic,SDA）数字滤波器具有速度快、结构规整等优点,广泛应用于数字信号处理器芯片级电路实现中.SDA在采样数据值位跳变频率比较高时,会导致很大的移位寄存器功耗,降低了SDA的性能、功耗比.研究SDA数字滤波器的低功耗设计,主要途径是通过一种优化阶符的二进制数据表示方式来表示采样数据,以达到减小采样数据值位跳变频率的目的,从而实现减小SDA数字滤波器的功耗.实验结果表明,本文研究的低功耗设计方法可有效减小SDA数字滤波器10%的功耗.     

WhiteWater: Distributed Processing of Fast Streams

Monitoring systems today often involve continuous queries over streaming data in a distributed collaborative fashion. The distribution of query operators over a network of processors, as well as their processing sequence, form a query configuration with inherent constraints on the throughput that it can support. In this paper, we discuss the implications of measuring and optimizing for output throughput, as well as its limitations. We propose to use instead the more granular input throughput and a version of throughput measure, the profiled input throughput, that is focused on matching the expected behavior of the input streams. We show how we can evaluate a query configuration based on profiled input throughput and that the problem of finding the optimal configuration is NP-hard. Furthermore, we describe how we can overcome the complexity limitation by adapting hill-climbing heuristics to reduce the search space of configurations. We show experimentally that the approach used is not only efficient but also effective.     

超密集网络中子信道和功率分配研究

超密集网络中,严重的小区间干扰制约了终端用户的数据速率,针对该问题,提出一种基于簇优先级的资源分配方案。该方案分为3个步骤:首先,采用基于图论的染色算法为毫微微接入点(Femtocell Access Points,FAPs)分簇;然后,以簇内每个毫微微用户(Femtocell User Equipments,FUEs)的待发送数据量、排队等待时延以及受干扰强度等作为优先级,计算每个簇的优先级,高优先级的簇可最先获得信道增益好的子信道;最后,利用卡罗需-库恩-塔克(Karush-Kuhn-Tucker,KKT)条件和注水算法为FUEs分配功率。仿真实验表明该方案能够有效地减小Femtocell间的干扰,并能够极大地满足用户的需求,同时提升系统的吞吐量和频谱效率。     

基于65nm工艺的高性能低功耗处理器设计

研究并设计一款RISC处理器,从架构设计、电路设计、芯片后端设计多个层次保证其高性能、低功耗的特点.在架构设计层面,通过扩展寄存器堆来提升数据交互的局部性并降低对存储器的访问次数.在电路设计层面,利用动态门控时钟技术对乘除法模块和寄存器堆进行高效的时钟控制.在芯片后端设计层面,分析并比较TSMC 65 nm中GP和LP 2种工艺库,采用多阈值设计流程进一步提高处理器的速度并降低功耗.测试结果表明,与其他平台下的性能结果相比,该处理器可以将RS前向纠错解码算法的吞吐率提高4倍～70倍.     

有源电力滤波器的自抗扰控制研究

针对采用PI控制器控制有源电力滤波器时存在谐波或基波电流指令而无法实现无静差调节,且数字化后会进一步增大稳态误差,使有源电力滤波器的补偿性能降低的问题,提出一种有源电力滤波器的自抗扰控制策略。该策略利用自抗扰控制器的非线性跟踪-微分器和扩张状态观测器分别处理参考输入和输出,并选择适当的状态误差,实现了对滤波的自动、精确补偿。仿真和实验结果表明,有源电力滤波器采用自抗扰控制策略后具有很强的鲁棒性、稳定性和适应性,控制性能有较大改善。     

A mixture-of-experts framework for adaptive Kalman filtering

This paper proposes a modular and flexible approach to adaptive Kalman filtering using the framework of a mixture-of-experts regulated by a gating network. Each expert is a Kalman filter modeled with a different realization of the unknown system parameters such as process and measurement noise. The gating network performs on-line adaptation of the weights given to individual filter estimates based on performance. This scheme compares very favorably with the classical Magill filter bank, which is based on a Bayesian technique, in terms of: estimation accuracy; quicker response to changing environments; and numerical stability and computational demands. The proposed filter bank is further enhanced by periodically using a search algorithm in a feedback loop. Two search algorithms are considered. The first algorithm uses a recursive quadratic programming approach which extremizes a modified maximum likelihood function to update the parameters of the best performing filter in the bank. This particular approach to parameter adaptation allows a real-time implementation. The second algorithm uses a genetic algorithm to search for the parameter vector and is suited for post-processed data type applications. The workings and power of the overall filter bank and the suggested adaptation schemes are illustrated by a number of examples.     

What is a pixel?

The total list of processing required to view a pixel includes antialiasing, offset sampling, color space projection, reconstruction filter compensation, compositing, gamma correction, and quantization and dithering. If we look at all these operations we can see a pattern: Almost all of them throw away information. When we filter out high frequencies, quantize intensities into bins, project a continuous color spectrum into three numbers, and represent geometric edges with a single transparency value we can see that an ordinary-hardware pixel, either refreshed on the screen or stored in a file, is simply a bad data compression technique. Any rendering algorithm or image processing operation that converts data to pixels generally loses information about the original data that it uses as input. A few polygons become thousands of pixels; a high-resolution image becomes a low-resolution image. Conversion to pixels for viewing purposes used to be a slow operation, but with faster processors we no longer need to do the image generation offline for speed purposes. We can recalculate the image whenever we need to look at it.     

基于FPGA的CNN图像识别加速与优化

目前,CNN已广泛应用于许多应用场景中,包括图像分类、语音识别、视频分析、文档分析等。由于CNN计算密集,常以GPU进行加速,但GPU功耗高,不适用于CNN推理阶段。基于此,文中研究了基于FPGA的CNN图像识别加速与优化的应用方法,利用Intel FPGA提供的OpenCL SDK,在FPGA板卡上设计并优化了CNN前向模型。首先,针对计算量问题,通过功能模块划分,充分发挥FPGA的高计算效能优势。其次,优化核心算法,提高运行速度;分析特征图处理操作,利用参数共享策略降低数据存储量;采用通道传输数据,减少访问片外存储次数。最后,对数据缓存、数据流、循环进行优化设计,缓解了FPGA片上的资源限制;通过量化参数降低FPGA内存资源占用量。实验结果表明,FPGA具有较低的功耗,CPU的功耗是其2.1倍,而GPU的功耗是其6.5倍;与近年来相关领域文献中提出的方法相比,所提方法具有较高的吞吐量和计算性能。     

一种高效节能的PR-MAC协议

为解决无线传感器网络能耗过大和效率不高的问题,提出一种功率控制和多速率自适应的PR-MAC协议。该协议采用功率控制和多速率自适应技术,在降低能耗的同时提高网络的吞吐量。仿真实验结果表明,该协议采用基于节点剩余能量和距离基站跳数的随机退避策略可提高网络效率,在选择节点发送数据上考虑节点的剩余能量和距离基站跳数等因素,能有效地平衡无线传感器网络的能量。     

A power efficiency routing and maintenance protocol in wireless multi-hop networks

In wireless multi-hop networks, selecting a path that has a high transmission bandwidth or a high delivery rate of packets can reduce power consumption and shorten transmission delay during data transmission. There are two factors that influence the transmission bandwidth: the signal strength of the received packets and contentions in the contention-based MAC layer. These two factors may cause more power to be consumed during data transmission. We analyze these two factors and propose a power-aware routing protocol called MTPCR. MTPCR discovers the desired routing path that has reduced power consumption during data transmission. In addition to finding a desired path to reduce power consumption, MTPCR also takes into account the situations in which the transmission bandwidth of the routing path may decrease, resulting in much power consumption during data transmission because of the mobility of nodes in a network. MTPCR is thus useful in a network: it analyzes power consumption during data transmission with the help of neighboring nodes, and it uses a path maintenance mechanism to maintain good path bandwidth. The density of nodes in a network is used to determine when to activate the path maintenance mechanism in order to reduce the overhead of this mechanism. With the proposed path maintenance mechanism, power consumption during data transmission can be efficiently reduced, as well as the number of path breakages. In our simulation, we compared our proposed routing protocol, MTPCR, with the following protocols: two classical routing protocols, AODV and DSR; two power-aware routing protocols, MMBCR and xMBCR; and one multiple path routing protocol, PAMP. The comparisons are made in terms of throughput of the routing path, power consumption in path discovery, power consumption in data transmission, and network lifetime.