SoC设计中的低功耗技术

SoC越来越成为设计的主流趋势，而应用系统对低功耗无止境的需求，使得SoC低功耗设计技术变得日益重要。本文首先介绍了低功耗的基本概念，包括原理、优化技术等，着重介绍了面向SoC的系统级功耗优化技术，最后展望了SoC低功耗设计的一些发展方向。     

在面向对象的SOC设计中应用设计模式

SoC的几乎无限的晶体管集成度正在引发电子系统设计的一场革命，即完成一种转变——从以功能设计为基础的传统流程转变到以功能组装为基础的全新流程。面向对象的技术被引入并应用到SoC设计中来，从系统的建模、设计空间探索到软硬件协同验证，贯穿于整个SoC设计过程中。设计模式是面向对象技术中一个很重要的概念和方法，将设计模式应用到SoC设计中来是一个很有前景的研究课题。本丈总结了前人在这个问题上做出的探索和研究，分析了软件设计模式在SoC设计中的适用性和重要性，比较了软件设计模式与其在SoC设计中应用的不同，总结了硬件设计中的几种模式，具有一定的通用性。     

片上系统的模型检验

片上系统(SoC)的验证是一个比较复杂的问题，仅靠模拟仿真无法保证SoC设计的正确。形式化方法是利用数学推理的方法来证明其正确．是对SoC设计进行验证的一条重要途径。模型检验技术是一种完全自动化的形式化方法，针对模型检验技术，讨论了在SoC验证中的应用，指出在SoC设计中，只有把模拟仿真与形式化、半形式化的方法结合起来，才能更好的对SoC进行验证。     

SoC设计语言：SystemC

应用的需求和集成电路工艺的发展促进了复杂的片上系统(SoC)的实现，同时也要求新的设计方法以支持复杂SoC的设计。高效率的软硬件联合设计需要对整个SoC进行更高层次(例如Transaction Level)的抽象以提供更快的仿真速度及更高效率的SoC设计验证方法。本文介绍了一种重要的SoC设计语言：SystemC，以及基于SystemC的Transaction Level模型和使用Transaction Level模型进行SoC的软硬件联合设计的方法。     

Cadence发布全面的商用验证锦囊

Cadence设计系统公司日前发布了面向无线和消费电子系统级芯片（SoC）设计的商用验证锦囊，帮助工程师们采用先进的验证技术，减少风险和应用难度，以满足上市时间要求。新锦囊可以解决工程师在设计和验证SoC设计时面临的关键挑战：     

基于ARM7TDMI的SoC中MP3子系统的设计

以信息系统作为目标直接优化软、硬件的片上系统(SoC)将大大节省软件和芯片资源,大大提高系统的集成度和性价比.文中主要介绍基于ARM7TDMI的面向多媒体的SoC中MP3子系统的优化设计.通过在SoC中增加多媒体加速器(MMA)模块和片上SRAM以及相关的软件优化方案,提出了一种基于低端精简指令集计算机(RISC)处理器核的面向多媒体应用(MP3)的SoC设计方法.该设计方法通过RTL验证,ADS(ARM Developer Suit)软件仿真,并通过MPW(Multi-Project Wafer)的流片已生产出实际芯片.在实际的芯片样机上得到了验证,达到了设计效果.     

专用指令集处理器系统级设计方法

以专用指令集处理器（ASIP）为核心的SoC系统是基于特定应用，设计嵌入式处理器的一个重要发展方向。给出了一种高效的系统级指令集模型设计空间搜索和体系结构仿真的方法。该方法可以在设计的早期阶段对软件和硬件进行协同设计和仿真，针对应用优化系统性能。利用该方法成功设计的ASIP系统，完成基4-64点DIF FFT需要310个时钟周期。     

异构双核SoC软件调试环境的研究与设计

分析了嵌入式系统远程调试原理,提出面向某异构双核SoC的调试环境设计方案,讨论了仿真器软硬件设计和调试代理软件设计等关键技术。该调试环境能够对目标平台进行在线编程和调试,解决了自主双核SoC处理器缺乏配套软件调试手段的实际问题,为目标平台的应用和推广提供了有力支撑,对其他面向多核处理器的调试环境设计具有参考价值。     

新工艺使混合信号SoC设计能为汽车和工业应用配备闪存

SoC(系统级芯片)一词往往令人想起位于消费电子产品核心、密集得难以置信的数字IC,但那些以汽车、工业和其它类似应用为目标的设计者也需要SoC.不过这些应用需要复杂的模拟功能以及对高压环境的承受力.AMI Semiconductor公司凭借其面向定制IC和结构化ASIC设计的0.35μm Smart Power SoC工艺瞄准了这类需要,设计者们现在可以向这类设计添加闪存了.     

面向SoC任务分配的应用程序存储需求量分析方法

通过分析应用程序的存储需求量,辅助片上系统(System-on-Chip, SoC)任务分配进行数据存储与传输优化,是改善SoC性能的途径之一.目前,存储需求量分析方法的分析粒度单一、速度缓慢,不利于进行多粒度任务分配空间的高效探索.本文面向SoC任务分配,提出一种多粒度、快速存储需求量分析方法.该方法可进行多粒度的存储需求量分析,并针对多媒体程序,引入数组数据域划分技巧,大幅度减少了存储需求量的分析时间.     

探测临近空间飞行器的天基雷达系统设计

天基雷达可以在全球范围内探测和跟踪运动目标,目前在军用和民用方面受到了广泛的关注.讨论了天基雷达系统用于临近空间飞行器探测设计的相关问题,研究了天基雷达预警系统的星座设计方法,利用STK软件仿真分析了单轨道全覆盖方案和全球覆盖方案,证明了提出的设计方法的可行性.     

Abstracting human control strategy in projecting light source

In this paper, we present a method for modeling human strategies in controlling a light source in a dynamic environment. In order to illustrate the procedure and method, we take a simple example of how to control a light source so as to avoid a shadow and to maintain appropriate illumination conditions on the target area of attention. This work is likely to be valuable in various applications of automatic light control-from surgical rooms and space applications to inspections     

空间用CORDIC处理器的结构级设计方法

文章分析了CORDIC处理器的各种结构。给出了如何在电路结构级根据具体设计要求对面积、时间和吞吐量等性能进行折衷的设计方法，并用该方法设计实现了面向空间应用、符合IEEE-754单精度标准、采用粒度为2的流水结构的高性能CORDIC处理器。该设计方法对CORDIC处理器的电路结构级设计有重要的指导和借鉴意义。     

The design space of wireless sensor networks

In the recent past, wireless sensor networks have found their way into a wide variety of applications and systems with vastly varying requirements and characteristics. As a consequence, it is becoming increasingly difficult to discuss typical requirements regarding hardware issues and software support. This is particularly problematic in a multidisciplinary research area such as wireless sensor networks, where close collaboration between users, application domain experts, hardware designers, and software developers is needed to implement efficient systems. In this article we discuss the consequences of this fact with regard to the design space of wireless sensor networks by considering its various dimensions. We justify our view by demonstrating that specific existing applications occupy different points in the design space.     

基于移动平台的模拟电子实验教学

针对传统实验教学的时间和空间限制问题,本文研究基于移动虚拟仿真软件的掌上移动虚拟仿真实验教学方法,使学生可以使用智能手机学习模电实验中电路搭建、信号处理、波形分析等方面的原理和应用,并实现基于第三方网络课堂平台的网络实验课、学习讨论和作业上传,从教学到实验完全摆脱实验课对空间和时间的限制,并可为其他高校开展基于移动设备的虚拟仿真实验教学提供参考。     

Signal Space Diversity Augmented Space Time Block Coded Communication System

In this paper we propose the combination of space-time diversity techniques and signal space diversity, in order to improve communication system performance. Specifically, we use prior knowledge of the channel behavior to design a mapping algorithm to generate a two-dimensional constellation with the same number of symbols as MPSK constellations currently used in coherent space time block coding applications, to demonstrate that superior performance can be achieved. This is accomplished by constructing a two-dimensional map that results from the minimization of the estimated symbol error probability when transmission occurs in a fading environment. System performance for each each mapping is assessed in quasi-static Rayleigh fading channels.     

Flexible Circuits and Architectures for Ultralow Power

Subthreshold digital circuits minimize energy per operation and are thus ideal for ultralow-power (ULP) applications with low performance requirements. However, a large range of ULP applications continue to face performance constraints at certain times that exceed the capabilities of subthreshold operation. In this paper, we give two different examples to show that designing flexibility into ULP systems across the architecture and circuit levels can meet both the ULP requirements and the performance demands. Specifically, we first present a method that expands on ultradynamic voltage scaling (UDVS) to combine multiple supply voltages with component level power switches to provide more efficient operation at any energy-delay point and low overhead switching between points. This system supports operation across the space from maximum performance, when necessary, to minimum energy, when possible. It thus combines the benefits of single-${V}_{rm DD}$ , multi-${V}_{rm DD}$, and dynamic voltage scaling (DVS) while improving on them all. Second, we propose that reconfigurable subthreshold circuits can increase applicability for ULP embedded systems. Since ULP devices conventionally require custom circuit design but the manufacturing volume for many ULP applications is low, a subthreshold field programmable gate array (FPGA) offers a cost-effective custom solution with hardware flexibility that makes it applicable across a wide range of applications. We describe the design of a subthreshold FPGA to support ULP operation and identify key challenges to this effort.      

Exploring the diversity of multimedia systems

We evaluate the validity of the fundamental assumption behind application-specific programmable processors: that applications differ from each other in key parameters which are exploitable, such as the available instruction-level parallelism (ILP), demand on various hardware resources, and the desired mix of function units. Following the tradition of the CAD community, we develop an accurate chip area estimate and a set of aggressive hardware optimization algorithms. We follow the tradition of the architecture community by using comprehensive real-life benchmarks and production quality tools. This combination enables us to build a unique framework for system-level synthesis and to gain valuable insights about design and use of application-specific programmable processors for modern applications. We explore the application-specific programmable processor (ASSP) design space to understand the relationship between performance and area. The architecture model we used is the Hewlett Packard PA-RISC with single level caches. The system, including all memory and bus latencies, is simulated and no other specialized ALU or memory structures are being used. The experimental results reveal a number of important characteristics of the ASSP design space. For example, we found that in most cases a single programmable architecture performs similarly to a set of architectures that are tuned to individual application. A notable exception is highly cost sensitive designs, which we observe need a small number of specialized architectures that require smaller areas. Also, it is clear that there is enough parallelism in the typical media and communication applications to justify use of high number of function units. We found that the framework introduced in this paper can be very valuable in making early design decisions such as area and architectural configuration tradeoff, cache and issue width tradeoff under area constraint, and the number of branch units and issue width     

基于空间应用的红外探测器驱动电路设计

以空间应用为目的,提出基于国产1024×6长波红外探测器的驱动电路设计方案。该方案利用LDO和电压跟随器产生探测器需要的驱动电压。通过对该方案进行论证及在某型号空间相机中应用,证明该方案切实有效,能够较好的满足空间应用需求。     

Analysis and Control of Equivalent Physical Simulator for Nanosatellite Space Radiator

A realistic prediction of the in-orbit transient performance of a nanosatellite space radiator requires a ground-based equivalent space radiator with a small size, simple configuration, and fast response. For this purpose, we present in this paper the design concept, operating principle, and analysis algorithm of a novel equivalent physical simulator (EPS) consisting of a thermoelectric cooler (TEC), a plate-fin heat sink, and a forced cooling fan. The TEC-based EPS achieves the purpose of simulating the in-orbit transient heat radiation in earth's atmospheric environment by adapting two key parameters: the TEC cooling capacity and the thermal resistance of the heat sink cooling fan. This paper offers results of in-depth numerical parametric studies leading to an EPS design that enables robust simulations under both hot-case and cold-case operations. In addition, we present the design and evaluation of a fuzzy controller for the EPS as an attractive alternative to the traditional PID controller. The fuzzy control presented here will have other potential thermal control applications where TECs and forced cooling heat sinks are employed.