一种640×480红外焦平面器件采集电路的设计

提出了640×480非制冷红外探测器UL04171驱动电路和焦平面器件模拟输出信号数字化的设计方法。针对UL04171探测器的工作条件,提出了偏置电压方案及满足该焦平面的双通道输出模拟信号数字化的AD模块设计。     

640×512InGaAs探测器驱动电路设计

在介绍了640×512 InGaAs探测器工作原理的基础上,详细分析了InGaAs探测器驱动电路的组成原理、设计方法,重点是偏置电压电路、脉冲电压与控制信号驱动电路、探测器工作温度检测及控制电路的设计等关键技术.采用模拟PI温控电路保证了探测器内部制冷器在温控过程中对探测器无干扰,并能使探测器稳定地工作在合适的温度点,这样有利于提高仪器的信噪比.试验结果表明:该驱动电路满足系统要求,能用于工作温度比较宽的场合,并具有体积小、实用性好、可靠性高等特点.     

320×256二类超晶格探测器驱动电路的设计

为了验证二类超晶格红外探测器的性能,设计了探测器的驱动电路。因红外探测器的灵敏度高,设计了低噪声电源偏置电路,优化了电路板的布局。结合320×256长波红外焦平面组件特点设计的驱动电路为探测器组件提供电源与偏置电压、时序与控制信号。实验结果表明,该驱动电路能基本满足二类超晶格红外成像系统低噪声、高精度的要求。     

白光干涉仪发射-接收机设计

详细阐述了白光干涉仪的设计过程，该设计主要包括驱动电路、光电I-V转换以厦电压放大3个模块。根据白光干涉的要求，其发射-接收机采用直流驱动，探测器高频响应的工作方式。但光源驱动电路的稳定性和光电探测器与放大器的连接对设计结果都会有影响。测试结果表明：选择LM317作稳压器，PIN光电二极管作探测器，采用I-V光电转换连接光电探测器与放大器的方式，可以满足设计要求。该干涉仪稳定性好，噪声低，可以很好地应用于白光干涉测量。     

基于PDP驱动技术的行扫描芯片浪涌电压抑制方法

分析了等离子体显示器中行扫描芯片的浪涌电压产生机理。结合浪涌电压产生机理从PDP驱动技术的角度提出抑制浪涌电压的理论方案,并以实验室PDP模组为实验载体,通过修改控制板驱动代码来实现该方案。通过实测新方案的波形,并观察PDP屏显示的静态图像与动态图像,验证了该方案可以有效抑制行扫描芯片的浪涌电压。该方案使得芯片的制造成本降低,从而缩减了整个PDP系统的成本。     

非制冷红外焦平面阵列器件驱动电路的研究

分析了电路噪声、电压波动和温度变化等对红外焦平面阵列探测器的工作状态和器件成像品质的影响,论述了设计驱动电路的必要性。在此基础上,设计了非制冷红外焦平面阵列器件的驱动电路,该电路由三个功能模块构成,分别是直流偏置电压电路、单芯片焦平面温度控制电路和基于现场可编程门阵列器件的时序逻辑驱动电路。实验表明,该驱动电路的控温精度优于0.05℃,直流偏压电源精度高,噪声低,时序驱动合理。     

基于CPLD的红外焦平面阵列驱动电路的设计

红外焦平面阵列是新型的红外探测器,为了使其达到理想的工作状态,需要提供时钟驱动脉冲和偏置电压.传统的方法是通过重写EEPROM等方式来改写驱动脉冲信号.设计了一种使用CPLD的红外焦平面探测器时钟驱动电路,其电路结构简单,具有较强的器件驱动能力,可实现CMOS TDI 288×4红外焦平面阵列和其他超长线列焦平面阵列的驱动,提供可调偏置电压,为红外焦平面阵列的性能调试提供方便.     

一种基于交错自举控制技术的全集成SCPC浮动电压驱动电路

设计了一种适用于全集成开关电容功率转换器(SCPC)的浮动电压驱动电路。该电路采用交错自举控制技术,周期性地利用多相交错SCPC中的特定单元为其他单元提供自举驱动。该电路实现了全部功率开关的浮动电压驱动,并且适用于所有SCPC拓扑。相比于传统浮动电压驱动方案,该驱动电路的硬件开销与SCPC中的器件数目无关。提出的浮动电压驱动电路应用于一个8相可重构SCPC中,仿真结果证明了其功能的正确性。     

一种新型VLSI电路外部电光探测器北大核心CSCD

采用极化聚合物电光材料,设计制作出一种结构新颖的亚微米VLSI电路正面入射式外部电光探测器。通过在探测器中引入参考电极,实现了电压的标定测量;利用1μm线宽指状电极的电场分布,验证了触立式极化聚合物电光探测器对电场具有较高的空间分辨率。实验证明,该新型外部电光探测器的空间分辨率可达0.5μm,完全满足亚微米电路无损探测的要求。     

InGaAs焦平面探测器成像组件的设计与实现

针对InGaAs短波红外成像在军事装备、安全防范和工业检测等领域中的应用,提出了一种基于FPGA技术架构的InGaAs焦平面探测器组件的设计方案.讨论了InGaAs焦平面探测器的时序驱动、TEC温控、非均匀性校正、图像增强和自动曝光等关键技术的实现方法.经试验验证,依据该方案研制出的InGaAs焦平面探测器成像组件灵敏度高、对比度好、透雾效果明显.     

新型FSK电力线收发器ST7540及其应用

介绍了新型单片式FSK电力线收发器ST7540的特点及工作原理,并给出基于ST7540的应用电路。ST7540采用半双工同步/异步FSK通信方式,专为低压电力线数据传输而设计,较好地克服了低压电力线载波传输中的技术问题,可广泛应用于空间限制,成本敏感的家庭和建筑物自动化以及遥控监视系统。     

A High-Power High-Voltage DC-DC Converter for Space Applications

The design details of a modular dc-dc converter used to power the main anode supply of a mercury-iron motor are presented. This motor, the RIT-35 built by Messerschmitt-B?lkowBlohm (MBB), Germany, is used as the propulsion unit of a future Asteroid Gravity Optical and Radar Analysis (AGORA) mission. The design selected to cope with the high-voltage high-power conversion for space applications is shown, as well as the requirement to operate from an unregulated solar array with a voltage excursion of from 150 V at beginning-of-mission (BOM) to 240 V at end-of-mission (EOM).     

Optimal Voltage Scaling, Repeater Insertion, and Wire Sizing for Wave-Pipelined Global Interconnects

The simultaneous application of voltage scaling, repeater insertion, and wire sizing is proposed in this paper to achieve high performance, low power, and low area on wave-pipelined interconnect circuits. Based on this methodology, design optimizations for three different types of applications are performed and different design metrics are used to obtain the optimal values of supply voltage, number of repeaters, and interconnect dimensions for these applications. The optimal supply voltage for low-power applications is shown to be twice the threshold voltage. In addition, an optimal throughput-per-energy-area (TPEA) design is compared with low-voltage differential signaling (LVDS). The optimal TPEA design is shown to reduce dynamic power by 10% and wire area by 70% compared to LVDS, without any loss of throughput performance.     

基于Matlab/Simulink的异步电机直接转矩控制方法的研究

本文通过分析异步电机数学模型,逆变器模型及空间矢量电压的分析来阐明异步电机直接转矩控制方法的原理,基于Matlab/Simulink仿真平台建立异步电机直接转矩控制方法仿真平台,仿真结果表明该控制方法使得系统变得简单,易于实现,具有广泛的应用意义。     

The Investigation on Single Event Function Failure for DC/DC Converters with Three Single Terminal Topological Structures

Heavy ion radiation experiments have been done to DC/DC converters with different topological structures for space applications.The test results were analyzed about the function failure of three topological structures caused by single event effects.The relationship between the function failure and the input supply voltage,the output load current and the topological structure of the module were discussed.Based on the analysis of the variation relationship among the source/drain terminal voltage of MOSFETs and the input voltage and the output load,the sensitivity factors associated with the function failure caused by single event effects were discussed.A new analysis on single event function failure of DC/DC converter based on different topologies has been presented,which can be applied to radiation hardened design and space application.     

Low-power encodings for global communication in CMOS VLSI

Technology trends and especially portable applications are adding a third dimension (power) to the previously two-dimensional (speed, area) VLSI design space. A large portion of power dissipation in high performance CMOS VLSI is due to the inherent difficulties in global communication at high rates and we propose several approaches to address the problem. These techniques can be generalized at different levels in the design process. Global communication typically involves driving large capacitive loads which inherently require significant power. However, by carefully choosing the data representation, or encoding, of these signals, the average and peak power dissipation can be minimized. Redundancy can be added in space (number of bus lines), time (number of cycles) and voltage (number of distinct amplitude levels). The proposed codes can be used on a class of terminated off-chip board-level buses with level signaling, or on tristate on-chip buses with level or transition signaling     

Low-voltage subthreshold CMOS current mode circuits: Design and applications

The world has migrated to portable applications ranging from smart phones to Lab on a Chip applications. However they come with a new set of challenges for analog IC designers. Low voltage operation, small area and low noise are the critical design criteria for portable devices. This paper presents a g_m/I_D based design methodology for low voltage current mode circuits using standard CMOS technology. A second generation current conveyor (CCII) and a current feedback operational amplifier (CFA) are designed using the discussed design procedure. Both circuits operate from a single 0.4 V supply. The CCII is used to implement an instrumentation amplifier. Multiple applications are implemented using the CFA. Post layout simulation using TSMC 90 nm and UMC 130 nm technology show that the presented design procedure is an attractive solution for low voltage CMOS current mode circuits.     

A Space Vector PWM Scheme for Multifrequency Output Voltage Generation With Multiphase Voltage-Source Inverters

Multiphase variable-speed drives, supplied from two-level voltage-source inverters (VSIs), are nowadays considered for various industrial applications. Depending on the drive structure and/or the motor design, the VSI is required to generate either sinusoidal voltages or voltages that contain a certain number of sinusoidal components (ldquomultifrequency output voltagesrdquo). The existing space vector pulsewidth-modulation (SVPWM) schemes are based on selection of (n-1) active space vectors (for odd phase numbers) within a switching period and they yield either sinusoidal voltage or sinusoidal fundamental voltage in combination with a limited amount of other harmonic terms. This paper develops a SVPWM scheme, which enables multifrequency output voltage generation with arbitrary values of various sinusoidal components in the output voltage. The method is based on initial selection of (n-1)²/2 active space vectors within a switching period, instead of the common (n-1) active vectors. By properly arranging the sequence of the vector application, it is possible to provide an automatic postreduction of the number of applied active vectors to (n-1), thus maintaining the same switching frequency as with the existing schemes while simultaneously avoiding the limiting on the generated sinusoidal output voltage components. Theoretical considerations are detailed using a five-phase VSI. The experimental verification is provided using a five-phase two-motor series-connected induction motor drive, supplied from a custom-designed five-phase DSP-controlled VSI.     

EEPROM单元抗辐射版图设计技术

随着EEPROM存储器件在太空和军事领域的广泛应用,国际上对EEPROM抗辐射性能的研究越来越多。为了达到提高存储器件抗辐射性能的目的,文章从版图设计的角度出发,首先分析了辐射对器件造成的影响,接下来分别介绍了基于FLOTOX和SONOS工艺的EEPROM器件特性,同时指出了在版图设计时需要注意的电压耦合比的问题。在设计中,利用管内隔离和管间隔离的方法,使得管内源/漏端和相邻两管源/漏端之间没有场氧介入,或是将场氧隔开,不让场区下形成漏电通道。设计出的EEPROM版图,不但满足了目前的工作需要,同时为以后抗辐射版图设计提供了有用的参考。     

永磁同步电机变频调速 矢量控制系统的研究和仿真分析

以电压空间矢量控制的基本原理和概念为基础,结合Matlab/simulink软件包构建了永磁同步电机变频调速矢量控制系统的仿真模型,并详细给出各模型的具体参数。仿真结果显示,该方法简单,控制精度高,用于永磁同步电动机变频调速系统中具有良好动、静态性能。