C-SAM sounds the warning for IC packaging defects

C-mode acoustic microscopy provides unique advantages over SLAM techniques in detecting microcracks, voids, and delaminations. The reliability of integrated circuit (IC) packages depends in many respects on their mechanical integrity. The effect of structural weaknesses caused by poor bonding, voids, microcracks or delaminations may not be evident in the electrical performance characteristics, but may cause premature failure. C-mode scanning acoustic microscopy (C SAM) is an excellent tool for non-destructive failure analysis of IC packages. It provides a rapid and comprehensive imaging of critical package defects and the location of these defects in three dimensions within the package     

声像分析在系统级封装和多芯片模块检测中的应用

用反射模式的超声波显微镜对系统级封装SIP和多芯片MCM封装模块的品质进行了研究。探测封装内部的分层、裂纹和气泡等间隙类缺陷。用超声探测转换器把脉冲超声波送入样品,同一个转换器把接收到的回声转换成像点。最大的反射振幅是从固体与气体间的界面产生的。在固体材料内部,分层、孔洞及裂纹会造成最大振幅的回声并可以成像。超声波显微镜可发现SIP和MCM样品内间隙类的缺陷分层裂纹和气泡。     

Analyses of LED nonlinear distortions

This paper treats LED nonlinear distortions of differential gain (DG) and differential phase (DP) theoretically. Possible origins and numerical analyses are presented for AlxGa1-xAs LED's, considering various junction structures; double-heterostructure, single-heterostructure, and homostructure. It is shown that homostructure is superior to the others in linearity. The double-heterostructure is superior in optical power generation and in high-speed modulation, if the same structure parameters are adopted. The effects on linearity of doping concentrations, thermal resistance, and carrier confinement breakdown due to insufficient heterointerface barrier height are analyzed. An experimental result is shown to confirm the analyses. The results obtained will contribute to linear LED design.     

Analyses of LED Nonlinear Distortions

This paper treats LED nonlinear distortions of differential gain (DG) and differential phase (DP) theoretically. Possible origins and numerical analyses are presented for Al/sub x/ Ga/sub 1-x/As LED's, considering various junction structure; double-heterostructure, single-heterostructure, and homostructure. It is shown that homostructure is superior to the others in linearity. The double-heterostructure is superior in optical power generation and in high-speed modulation, if the same structure parameters are adopted. The effects on linearity of doping concentrations, thermal resistance, and carrier confinement breakdown due to insufficient heterointerface barrier height are analyzed. An experimental result is shown to confirm the analyses. The results obtained will contribute to linear LED design.     

Numerical study on thermal impacts of different void patterns on performance of chip-scale packaged power device

Chip scale package (CSP) technology offers promising solutions to package power device due to its relatively good thermal performance among other factors. Solder thermal interface materials (STIMs) are often employed at the die bond layer of a chip-scale packaged power device to enhance heat transfer from the chip to the heat spreader. Nonetheless, the presence of voids in the solder die-attach layer impedes heat flow and could lead to an increase in the peak temperature of the chip. Such voids which form easily in the solder joint during reflow soldering process at manufacturing stage are primarily occasioned by out-gassing phenomenon and defective metallisation. Apparently, the thermal consequences of voids have been extensively studied, but not much information exist on precise effects of different patterns of solder die-attach voids on the thermal performance of chip-level packaged power device. In this study, three-dimensional finite element analysis (FEA) is employed to investigate such effects. Numerical studies were carried out to characterise the thermal impacts of various voids configurations, voids depth and voids location on package thermal resistance and chip junction temperature. The results show that for equivalent voiding percentage, thermal resistance increases more for large coalesced void type in comparison to the small distributed voids configuration. In addition, the study suggests that void extending through the entire thickness of solder layer and voids formed very close to the heat generating area of the chip can significantly increase package thermal resistance and chip junction temperature. The findings of this study indicate that void configurations, void depth and void location are vital parameters in evaluating the thermal effects of voids.     

粘结层空洞对功率器件封装热阻的影响

功率器件的热阻是预测器件结温和可靠性的重要热参数,其中芯片粘接工艺过程引起的粘结层空洞对于器件热性能有很大的影响。采用有限元软件Ansys Workbench对TO3P封装形式的功率器件进行建模与热仿真,精确构建了不同类型空洞的粘结层模型,包括不同空洞率的单个大空洞和离散分布小空洞、不同深度分布的浅层空洞和沿着对角线分布的大空洞。结果表明,单个大空洞对器件结温和热阻升高的影响远大于相同空洞率的离散小空洞;贯穿粘结层的空洞和分布在芯片与粘结层之间的浅空洞会显著引起热阻上升;分布在粘结层边缘的大空洞比中心和其他位置的大空洞对热阻升高贡献更大。     

一种通用低成本大功率高亮度LED封装技术

提出了一种热传导高、热膨胀匹配良好、低成本、大功率、高亮度LED封装技术。该技术采用光电子与微电子技术相结合，利用背面出光的LED芯片，倒装焊接在有双向浪涌和静电保护电路的硅基板上。由于在封装中引入了热膨胀过渡层，在保证良好热膨胀匹配的同时，热阻增加少。采用该封装技术封装的白光LED，发光稳定，光衰小，长期寿命高。     

Reliability of high radiance InGaAsP/InP LED́s operating in the 1.2-1.3 µm wavelength

The reliability of high radiance InGaAsP/InP DH LED's operating in the1.2-1.3 mum wavelength and the defect structures observed in this quaternary alloy have been presented. Threading dislocations and misfit dislocations do not act as strong nonradiative recombination centers, in contrast with the case in GaAs or GaAlAs optical devices. Dark-spot defects (DSD's) were sometimes generated in the emitting area during aging at elevated temperatures. These defects were analyzed microscopically using a transmission electron microscope and were identified as precipitates. To investigate the homogeneous degradation, accelerated aging at the ambient temperatures of 20, 60, 120, 170, 200, and 230°C has been carried out for over 15 000 h at the current density of 8 kA/cm²using LED's without dark structures. The degradation rates were statistically calculated by assuming the normal distribution. The mean values of degradation rates and the values of standard deviation were determined at the temperatures above 170°C. The activation energy of homogeneous degradation was determined to be 1.0 eV and the extrapolated half-life in excess of 10⁹h was estimated at the ambient temperature of 60°C.     

Accurate determination of temperature rise in Burrus-type LED's by using resonant reflection spectra

At the high injection operation of double-heterostructure (DH) light emitting diodes (LED's), such specific phenomena as temperature rise, band filling, carrier overflow, and ambipolar diffusion affect the device performance. We present an accurate method of mea, suring temperature rise in Burrus-type LED's by using resonant reflection spectra. This method is superior, especially for the high injection region, to the conventional emission-spectrum method and junction-voltage method due to its band filling-free and injection-free properties. An accuracy of ±0.8 K has been obtained, which is four times better than that of the emission-spectrum method in the case of Burrus-type LED's. This improvement is accomplished by using the resonant spectra in an absorption-free infrared spectral region. Thermal properties including dynamic behavior can be characterized quantitatively by deriving the thermal resistance and the thermal time constant of the device.     

大功率LED焊料层的可靠性研究

将功率循环方法应用于大功率LED焊料层的可靠性研究,对比分析了在650 mA,675 mA和700 mA电流条件下大功率LED焊料层的热阻退化情况。实验结果表明,循环达到一定次数,大功率LED热阻才开始退化,并呈线性增加,从而引起光通量下降;另外,失效循环次数与电流值之间呈线性关系,并外推出正常工作条件下焊料层寿命为90 968次。对样品进行了超声波检测(C-SAM),发现老化后LED焊料层有空洞形成,这说明空洞是引起热阻升高的主要原因。     

基于ASAP软件的LED光学特性模拟

介绍了LED的应用及前景,着重阐述了ASAP软件的使用,并根据LED的发光理论利用该软件对LED进行了光学建模,经过光线追迹后,所建模型的光强分布与实际LED光强分布吻合很好,为二次光学设计打下基础。     

用于光纤通信系统的高速LED发展状况

本文主要叙述了国内外高速 LED 的发展现状,并分析了各种器件结构,结出了一些高速 LED 的性能参数。最后展望了 LED 在光纤通信中的进一步应用。     

Optical constants of silicon nanoparticle thin films grown by laser electrodispersion

The study of films consisting of amorphous close-packed silicon nanoparticles grown by laser electrodispersion is continued. The optical transmission and reflection spectra of films fabricated in vacuum and at various pressures of oxygen introduced into the chamber to passivate the nanoparticle surface are measured. The spectra of the refractive index and extinction coefficient are calculated. The shape of the spectra of the optical constants correlates with that of the spectra of bulk amorphous silicon; however, the values obtained differ from the parameters of bulk amorphous silicon. The differences are caused by the significant volume of voids between nanoparticles and a large number of dangling bonds (defects) on the nanoparticle surface. The optical constants decrease with increasing oxygen content in the films, which is indicative of the passivation of dangling bonds by oxygen.     

Formation of thermal decomposition cavities in physical vapor transport of silicon carbide

The relationship between seed mounting and the formation of thermal decomposition cavities in physical vapor transport grown silicon carbide was investigated. Scanning electron microscopy, energy dispersive x-ray spectroscopy, Auger electron spectroscopy, and optical microscopy were used to characterize thermal decomposition cavities at various stages of their development. The observations indicate that the attachment layer that holds the seed to the graphite crucible lid frequently contains voids. The seed locally decomposes at void locations and Si-bearing species are transported through the void. The decomposition produces a cavity in the seed; the silicon is deposited on and diffuses into the graphite lid. The formation of thermal decomposition cavities can be suppressed by the application of a diffusion barrier on the seed crystal backside.     

Effective thermal conductivity of porous solder layers

Microscopic voids in the die attachment solder layers of power semiconductor devices degrade their overall thermal transfer performance. This paper presents analytical results of the effect of spherical and spheroidal void geometries on the thermal conductivity of bulk media. Analytical results are compared with axially symmetric and three-dimensional thermal simulations of single and multiple cavity defects in planar structures. The effective thermal conductivity of the die to the case attachment solder layer of two commercial metal oxide semiconductor field effect transistor (MOSFET) devices is estimated using these results, with cavity dimensions and distributions obtained by electron microscopy.     

基于微通道散热的大功率LED阵列的热阻研究

采用微通道致冷技术,设计了大功率LED阵列的外部热沉.针对直鳍片微通道结构的散热器,理论分析了影响其热阻的因素,推导了热阻表达式,并对微通道散热器的结构参数进行了优化,指出当通道宽度取某一数值时,散热器的热阻可达到最小.利用MATLAB软件,对LED的热阻与微通道散热器的结构参数和冷却液的压力关系进行了仿真,给出了直观的关系曲线.     

Ceramic capacitor insulation resistance failures accelerated by low voltage

Ceramic capacitors failed insulation resistance at less than 1/10 th their rated voltage despite the fact that they had been subjected to "voltage conditioning" at twice the rated voltage for 100 h. Many failures recovered as the voltage was increased. Using special sectioning procedures, the failures were isolated to single ceramic plates; however, extensive analysis did not initially determine the cause of failure. Finally, the ceramic was ground from all four sides and an unexpected discovery was made: the plates could be peeled apart intact. This allowed dissection of the capacitor structure, completely exposing the shorted plates. Using the absorbed-current mode of the SEM, it was determined that the only leakage was through very small voids in the ceramic. Peeling the plates apart also provided the ability to see delaminations and other defects in three dimensions and to examine the electrodes and plate surfaces in minute detail. Based on this and related experiences, it is concluded that ceramic capacitors that fail at low voltage and recover or partially recover as the voltage is increased are fairly prevalent. Screening results indicate the need for special screening for ceramic capacitors intended for low-voltage applications.     

GaAs0.6P0.4LED's with efficient transparent contacts for spatially uniform light emission

Indium-tin oxide (ITO) and cadmium-tin oxide (CTO) transparent contacts have been used on GaAs0.6P0.4planar, red-light-emitting diodes. The entire emitting area of the diode can be contacted without blocking any of that area with opaque metal. Furthermore, the low sheet resistance of the transparent conducting films (2.5 to 3.5 ω/□) makes the spatial distribution of the emitted light more uniform. The spatial uniformity of the light output of LED's fabricated with transparent contacts is compared with that of conventional LED's. The current-voltage characteristics of the two types of LED are also compared. For an average current density of 25 A/cm², an undesirable excess voltage (> 1.2 V) is developed across the reverse-biased (n-transparent conductor)-(p-GaAs0.6P0.4) heterojunction. Procedures are described for reducing and, in some cases, completely eliminating this voltage by introducing a thin, transparent metal film between the transparent conductor and the GaAs0.6P0.4. The resulting devices have optical and electrical efficiencies comparable to those of conventional LED's.     

InGaAsP/InP 1.3-µm wavelength surface-emitting LED's for high-speed short-haul optical communication systems

Performance and reliability for InGaAsP/InP 1.3-µm wavelength high-speed surface-emitting DH light emitting diodes (LED's) have been investigated. High-speed and high-radiance performances were obtained by the optimal design of both structural parameters and LED driving circuit. Rise and fall times were both 350 ps and peak optical power coupled to a 50-µm core 0.20 NA graded-index fiber at the 100-mA pulse current was - 15.8 dBm with 6-dB optical ON/OFF ratio. A 2-Gbit/s non-return-to-zero (NRZ) pulse transmission over a 500-m span was carried out, Feasibility of using surface-emitting LED's in a high-speed optical communication system has been confirmed. Accelerated aging tests on high-speed LED's were carried out. The half-power lifetimes have been estimated to be more than 1 × 10⁸h at 50°C ambient temperature.     

Influence of halogen-free compound and lead-free solder paste on on-board reliability of green CSP (chip scale package)

In the past few years, many studies have reported on the formula of solder metal alloy materials. This paper discusses the influence of organic materials characters, the decomposing rate of flux in lead-free solder paste and coefficients of thermal expansion (CTE) of halogen-free mold compounds during the on-board reliability test, and the failure mechanism in both 63Sn/37Pb and Sn–3.5Ag–0.5Cu lead-free solder balls was reported.The thermal decomposing behavior of flux in the solder paste induced voids in solder joints was examined by thermo-gravimetric analysis (TGA) and X-ray perspective, respectively. On-board temperature cycle test (TCT) reliability failed specimens were sectioned and analyzed by the optical microscope (OM) and X-ray. The evolutions of package warpage change of two kinds of potential halogen-free compounds during the TCT reliability process were monitored by specially designed thermal mechanic analysis (TMA) experiments.The experimental results show that higher IR-reflow peak temperature induced voids forming in the solder joints and then failure mode change from interface between intermetallic and solder to cracks cut across the big voids during TCT test, worse TCT reliability performance ensued. Moreover, according to on-board reliability testing data show that the compound with larger package warpage change generated larger cumulate plastic work in solder joint that caused early failure during TCT process.