Plastic‐film displays with NanoBlock IC drivers integrated by a fluidic self‐assembly process

Abstract— High‐performance compact plastic displays have been built by integrating high‐quality crystalline‐Si NanoBlock IC drivers into plastic films using a fluidic self‐assembly (FSA) process. Plastic‐film‐based liquid‐crystal displays, only 500 μm thick, were integrated into smartcards using NanoBlock IC voltage drivers. In an additional demonstration, polymer‐LED displays were constructed using NanoBlock IC current drivers. FSA technology provides a cost‐effective means of packaging integrated circuits within plastic film, enabling high‐performance backplanes that can be combined with a variety of display media.     

Printing of polymer thin‐film transistors for active‐matrix‐display applications

Abstract— We present a process for active‐matrix flat‐panel‐display manufacture based on solution processing and printing of polymer thin‐film transistors. In this process, transistors are fabricated using soluble semiconducting, conducting, and dielectric polymer materials. Accurate definition of the transistor channel and other circuit components are achieved by direct ink‐jet printing combined with surface‐energy patterning. We have used this process to create 4800‐pixel 50‐dpi active‐matrix backplanes. These backplanes were combined with polymer‐dispersed liquid crystal to create the first ink‐jet‐printed active‐matrix displays. Our process is, in principle, environmentally friendly, low temperature, compatible with flexible substrates, cost effective, and advantageous for short‐run length and large display sizes. As well as polymer‐dispersed liquid crystal, this technology is applicable to conventional liquid‐crystal and electrophoretic display effects.     

Active‐matrix technology for high‐efficiency OLED displays

Organic light‐emitting device (OLED) technology has recently been shown to demonstrate excellent performance and cost characteristics for use in numerous flat‐panel‐display (FPD) applications. Universal Display Corp. (UDC), together with its academic partners at Princeton University and the University of Southern California, are developing high‐efficiency electrophosphorescent OLEDs, based on triplet emission. These material systems show good lifetimes, and are well suited for the commercialization of low‐power‐consumption full‐color active‐matrix OLED displays. Their very high conversion efficiencies may even allow them to be driven by amorphous‐silicon backplanes, and in this paper we consider design guidelines for an amorphous‐silicon pixel to minimize display non‐uniformities due to threshold voltage variations.     

Development of rollable silicon thin‐film‐transistor backplanes utilizing a roll‐to‐roll continuous lamination process

Abstract— Rollable silicon thin‐film‐transistor (TFT) backplanes utilizing a roll‐to‐roll process have been developed. The roll‐to‐roll TFT‐backplane technology is characterized by a glass‐etching TFT transfer process and a roll‐to‐roll continuous lamination process. The transfer process includes high‐rate, uniform glass‐etching to transfer TFT arrays fabricated on a glass substrate to a flexible plastic film. In the roll‐to‐roll process, thinned TFT‐glass sheets (0.1 mm) and a base‐film roll are continuously laminated using a permanent adhesive. Choosing both an appropriate elastic modulus for the adhesive and an appropriate tension strength to be used in the process is the key to suppressing deformation of the TFT‐backplane rolls caused by thermal stress. TFT backplanes that can be wound, without any major physical damage such as cracking, on a roll whose core diameter is approximately 300 mm have been sucessfully obtained. Incorporating the TFT‐backplane rolls into other roll components, such as color‐filter rolls, will make it possible to produce TFT‐LCDs in a fully roll‐to‐roll manufacturing process.     

Temporary bond—debond technology for high‐performance transistors on flexible substrates

Abstract— A processing technology based upon a temporary bond—debond approach has been developed that enables direct fabrication of high‐performance electronic devices on flexible substrates. This technique facilitates processing of flexible plastic and metal‐foil substrates through automated standard semiconductor and flat‐panel tool sets without tool modification. The key to processing with these tool sets is rigidifying the flexible substrates through temporary bonding to carriers that can be handled in a similar manner as silicon wafers or glass substrates in conventional electronics manufacturing. To demonstrate the power of this processing technology, amorphous‐silicon thin‐film‐transistor (a‐Si:H TFT) backplanes designed for electrophoretic displays (EPDs) were fabricated using a low‐temperature process (180°C) on bonded‐plastic and metal‐foil substrates. The electrical characteristics of the TFTs fabricated on flexible substrates are found to be consistent with those processed with identical conditions on rigid silicon wafers. These TFTs on plastic exhibit a field‐effect mobility of 0.77 cm²/V‐sec, on/off current ratio >10⁹ at Vds = 10 V, sub‐threshold swing of 365 mV/dec, threshold voltage of 0.49 V, and leakage current lower than 2 pA/μm gate width. After full TFT‐array fabrication on the bonded substrate and subsequent debonding, the flexible substrate retains its original flexibility; this enables bending of the EPD display without loss in performance.     

Full‐color active‐matrix OLED based on a‐Si TFT technology

Abstract— We have successfully demonstrated a 4‐in. full‐color active‐matrix OLED display based on amorphous‐Si (a‐Si) TFT technology. With improvements in the TFT manufacturing process and structure, a‐Si TFTs provide abundant capability to drive OLEDs. This demonstration clearly shows the possibility of using a‐Si TFTs as driving backplanes in the manufacture of full‐color AMOLEDs.     

Amorphous‐oxide TFT backplane for large‐sized AMOLED TVs

Abstract— Amorphous‐oxide thin‐film‐transistor (TFT) arrays have been developed as TFT backplanes for large‐sized active‐matrix organic light‐emitting‐diode (AMOLED) displays. An amorphous‐IGZO (indium gallium zinc oxide) bottom‐gate TFT with an etch‐stop layer (ESL) delivered excel lent electrical performance with a field‐effect mobility of 21 cm²/V‐sec, an on/off ratio of >10⁸, and a subthreshold slope (SS) of 0.29 V/dec. Also, a new pixel circuit for AMOLED displays based on amorphous‐oxide semiconductor TFTs is proposed. The circuit consists of four switching TFTs and one driving TFT. The circuit simulation results showed that the new pixel circuit has better performance than conventional threshold‐voltage (VTH) compensation pixel circuits, especially in the negative state. A full‐color 19‐in. AMOLED display with the new pixel circuit was fabricated, and the pixel circuit operation was verified in a 19‐in. AMOLED display. The AMOLED display with a‐IGZO TFT array is promising for large‐sized TV because a‐IGZO TFTs can provide a large‐sized backplane with excellent uniformity and device reliability.     

High‐efficiency p‐i‐n organic light‐emitting diodes with long lifetime

Abstract— High‐performance organic light‐emitting diodes (OLEDs) are promoting future applications of solid‐state lighting and flat‐panel displays. We demonstrate here that the performance demands for OLEDs are met by the PIN (p‐doped hole‐transport layer/intrinsically conductive emission layer/n‐doped electron‐transport layer) approach. This approach enables high current efficiency, low driving voltage, as well as long OLED lifetimes. Data on very‐high‐efficiency diodes (power efficiencies exceeding 70 lm/W) incorporating a double‐emission layer, comprised of two bipolar layers doped with tris(phenylpyridine)iridium [Ir(ppy)₃], into the PIN architecture are shown. Lifetimes of more than 220,000 hours at a brightness of 150 cd/m² are reported for a red PIN diode. The PIN approach further allows the integration of highly efficient top‐emitting diodes on a wide range of substrates. This is an important factor, especially for display applications where the compatibility of PIN OLEDs with various kinds of substrates is a key advantage. The PIN concept is very compatible with different backplanes, including passive‐matrix substrates as well as active‐matrix substrates on low‐temperature polysilicon (LTPS) or, in particular, amorphous silicon (a‐Si).     

Driver‐circuits‐integrated LCDs based on novel amorphous In‐Ga‐Zn‐oxide TFT

Abstract— A liquid‐crystal panel integrated with a gate driver and a source driver by using amorphous In—Ga—Zn‐oxide TFTs was designed, prototyped, and evaluated. By using the process of bottom‐gate bottom‐contact (BGBC) TFTs, amorphous In—Ga—Zn‐oxide TFTs with superior characteristics were provided. Further, for the first time in the world, a 4‐in. QVGA liquid‐crystal panel integrated with a gate driver and a source driver was developed by using BGBC TFTs formed from an oxide semiconductor. By evaluating the liquid‐crystal panel, its functionality was successfully demonstrate. Based on the findings, it is believed that the novel BGBC amorphous In—Ga—Zn‐oxide TFT will be a promising candidate for future large‐screen backplanes having high definition.     

Contrast‐enhanced wide‐angle high‐speed polarization modulator for active‐retarder 3‐D displays

Abstract— A contrast‐enhanced wide‐angle high‐speed polarization modulator for active‐retarder 3‐D displays is proposed. By using a double liquid‐crystal‐cell structure together with a dedicated driving scheme and an external quarter‐wave retarder, a high‐performance modulator can be realized, resulting in minimized brightness loss and low cross‐talk levels in fast‐refresh time‐multiplexed 3‐D displays.     

Novel back‐channel‐etch process flow based a‐IGZO TFTs for circuit and display applications on PEN foil

In this study, we report high‐quality amorphous indium–gallium–zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs) fabricated on a polyethylene naphthalate foil using a new back‐channel‐etch (BCE) process flow. The BCE flow allows a better scalability of TFTs for high‐resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165 °C in order to ensure good overlay accuracy (<1 µm) on foil. The presented process flow differs from the previously reported flow as we define the Mo source and drain contacts by dry etch prior to a‐IGZO patterning. The TFTs show good electrical performance, including field‐effect mobilities in the range of 15.0 cm²/(V·s), subthreshold slopes of 0.3 V/decade, and off‐currents <1.0 pA on foil. The threshold voltage shifts of the TFTs measured were less than 1.0 V after a stressing time of 10⁴ s in both positive (+1.0 MV/cm) and negative (?1.0 MV/cm) bias directions. The applicability of this new BCE process flow is demonstrated in a 19‐stage ring oscillator, demonstrated to operate at a supply voltage of 10 V with a stage delay time of 1.35 µs, and in a TFT backplane driving a 32 × 32 active‐matrix organic light‐emitting diode display.     

Process study and optimization for fabrication of poly‐Si thin‐film transistors on plastic substrates

Abstract— A complete poly‐Si thin‐film transistor (TFT) on plastic process has been optimized to produce TFT arrays for active‐matrix displays. We present a detailed study of the poly‐Si crystallization process, a mechanism for protecting the plastic substrate from the pulsed laser used to crystallize the silicon, and a high‐performance low‐temperature gate dielectric film. Poly‐Si grain sizes and the corresponding TFT performance have been measured for a range of excimer‐laser crystallization fluences near the full‐melt threshold, allowing optimization of the laser‐crystallization process. A Bragg reflector stack has been embedded in the plastic coating layers; its effectiveness in protecting the plastic from the excimer‐laser pulse is described. Finally, we describe a plasma pre‐oxidation step, which has been added to a low‐temperature (<100°C) gate dielectric film deposition process to dramatically improve the electrical properties of the gate dielectric. These processes have been integrated into a complete poly‐Si TFT on plastic fabrication process, which produces PMOS TFTs with mobilities of 66 cm² /V‐sec, threshold voltages of ?3.5 V, and off currents of approximately 1 pA per micron of gate width.     

Roll‐to‐roll manufacturing of electronics on flexible substrates using self‐aligned imprint lithography (SAIL)

Abstract— The manufacture of large‐area arrays of thin‐film transistors on polymer substrates using roll‐to‐roll (R2R) processes exclusively is being developed. Self‐aligned imprint lithography (SAIL) enables the patterning and alignment of submicron‐sized features on meter‐scaled flexible substrates in the R2R environment. SAIL solves the problem of precision interlayer registry on a moving web by encoding all the geometry information required for the entire patterning steps into a monolithic three‐dimensional imprint with discrete thickness modulation. The pre‐aligned multiple‐step mask structure maintains its alignment regardless of subsequent substrate distortion. Challenges are encountered in relation to the novel nature of using flexible substrates and building toolsets for the R2R processing. In this paper, methods of the SAIL process, the resulting active‐matrix backplanes, the trajectory of SAIL process development, and the remaining issues for production are presented.     

Low‐temperature amorphous‐silicon backplane technology development for flexible displays in a manufacturing pilot‐line environment

Abstract— A low‐temperature amorphous‐silicon (a‐Si:H) thin‐film‐transistor (TFT) backplane technology for high‐information‐content flexible displays has been developed. Backplanes were integrated with frontplane technologies to produce high‐performance active‐matrix reflective electrophoretic ink, reflective cholesteric liquid crystal and emissive OLED flexible‐display technology demonstrators (TDs). Backplanes up to 4 in. on the diagonal have been fabricated on a 6‐in. wafer‐scale pilot line. The critical steps in the evolution of backplane technology, from qualification of baseline low‐temperature (180°C) a‐Si:H process on the 6‐in. line with rigid substrates, to transferring the process to flexible plastic and flexible stainless‐steel substrates, to form factor scale‐up of the TFT arrays, and finally manufacturing scale‐up to a Gen 2 (370 × 470 mm) display‐scale pilot line, will be reviewed.     

Digital lithographic processing for large‐area electronics

Abstract— A non‐contact jet‐printed mask‐patterning process is described. By combining digital imaging with jet printing, digital lithography was used to pattern a‐Si:H‐based electronics on glass and plastic substrates in place of conventional photolithography. This digital lithographic process is capable of layer‐to‐layer registration of ±5 μm using electronic mask files that are directly jet printed onto a surface. Aminimum feature size of 50 μm was used to create 180 × 180 element backplanes having 75‐dpi resolution for display and image‐sensor applications. By using a secondary mask process, the minimum feature size can be reduced down to ～15 μm for fabrication of short‐channel thin‐film transistors. The same process was also used to pattern black‐matrix wells in fabricating color‐filter top plates in LCD panels.     

Toward high‐resolution,inkjet‐printed,quantum dot light‐emitting diodes for next‐generation displays

We have investigated the possibility of fabricating quantum dot light‐emitting diodes (QLEDs) using inkjet printing technology, which is the most attractive method for the full‐color patterning of QLED displays. By controlling the quantum dot (QD) ink formulation and inkjet printing condition, we successfully patterned QLED pixels in the 60‐in ultrahigh definition TV format, which has a resolution of 73 pixels per inch. The inkjet‐printed QLEDs exhibited a maximum luminance of 2500 cd/m². Although the performance of inkjet‐printed QLEDs is low compared with that of QLEDs fabricated using the spin‐coating process, our results clearly indicate that the inkjet printing technology is suitable for patterning QD emissive layers to realize high‐resolution, full‐color QLED displays.     

Clamped‐inverter circuit architecture for luminescent‐period‐control driving of active‐matrix OLED displays

Abstract— An innovative pixel‐driving technology for high‐performance active‐matrix OLED flat‐panel displays is described. Called “clamped‐inverter circuit architecture,” it uses luminescent‐period‐control driving to reduce the inter‐pixel non‐uniformity caused by the device‐to‐device variability of low‐temperature poly‐Si TFTs. A prototype full‐color display shows a luminous deviation of less than 1.6%, which corresponds to only the LSB‐error in 6‐bit gray‐scale.     

Passive‐matrix polymer light‐emitting displays

Abstract— Organic light‐emitting device research focuses on the use of small‐molecule and polymer materials to make organic electroluminescent displays, with both passive‐ and active‐matrix technologies. This paper will focus on the characteristics of red, green, and blue electroluminescent polymers suitable for fabricating monochrome and full‐color passive‐matrix displays. The stability of polymer OLEDs, and the use of ink‐jet printing for direct high‐resolution patterning of the light‐emitting polymers will also be discussed. It will be shown that the performance of light‐emitting polymers is at the brink of being acceptable for practical applications.     

Review Paper: Multi‐primary‐color displays: The latest technologies and their benefits

Abstract— Multi‐primary‐color (MPC) display technology is one of the fastest emerging research areas in recent years. Wide‐color‐gamut display devices have been required for visually sufficient and/or accurate color reproduction. It is well known that MPC displays can reproduce accurate colors with high efficiency. In addition, not only the image‐quality improvement but some other performance of display devices is also required for display devices. This paper reviews achievements in MPC display technologies and focuses on the benefits of MPC displays: power‐savings and high resolution.     

Solution‐processed and low‐temperature metal oxide n‐channel thin‐film transistors and low‐voltage complementary circuitry on large‐area flexible polyimide foil

High‐performance solution‐based n‐type metal oxide thin‐film transistors (TFTs), fabricated directly on polyimide foil at a post‐annealing temperature of only 250 °C, are realized and reported. Saturation mobilities exceeding 2 cm²/(Vs) and on‐to‐off current ratios up to 10⁸ are achieved. The usage of these oxide n‐type TFTs as the pixel drive and select transistors in future flexible active‐matrix organic light‐emitting diode (AMOLED) displays is proposed. With these oxide n‐type TFTs, fast and low‐voltage n‐type only flexible circuitry is demonstrated. Furthermore, a complete 8‐bit radio‐frequency identification transponder chip on foil has been fabricated and measured, to prove that these oxide n‐type TFTs have reached already a high level of yield and reliability. The integration of the same solution‐based oxide n‐type TFTs with organic p‐type TFTs into hybrid complementary circuitry on polyimide foil is demonstrated. A comparison between both the n‐type only and complementary elementary circuitry shows the high potential of this hybrid complementary technology for future line‐drive circuitry embedded at the borders of flexible AMOLED displays.