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本文介绍了一种封装基板散热效能提升方案,通过同时采用高导热封装基板材料和铜柱法工艺,实现封装基板的热导率得到显著提升。本研究的重点是封装载板的热性能,从基板材料和封装基板工艺制备的角度出发,对高导热率封装基板材料进行工艺的可靠性分析和实验验证。此外,还提供了封装基板材料的热导率和相应封装载板产品的热扩散系数测试方法及测试结果的讨论。同时,对比研究了高导热率的封装基板材料和传统的封装基板材料分别应用于与铜柱法工艺和激光工艺。实验结果表明,由于铜柱法可以实现实心互联结构且侧壁光滑,高导热率封装基板材料结合铜柱法可实现最优的散热效果,对应的封装载板产品的热扩散系数和热导率较传统的封装基板材料分别提升60%和2.6倍,在未来芯片和模组封装热管理中具备显著的优势和潜力。 相似文献
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本文针对激光雷达转镜扫描电机对调速精度、频率和运动幅度的需求,提出了一种基于高热导率石墨膜的GaN半桥功率器封装方案。仿真结果表明,与环氧玻璃布层压板(FR-4)基板、FR-4基板+铜散热片、陶瓷基板三种散热结构相比,采用FR-4基板+导热石墨膜散热结构的GaN半桥功率器,制备成本较低、工艺复杂度可控、成品质量轻、散热性能好,最高可降温32.6℃,散热性能可提升29.6%。导热底部填充胶起到热耦合作用,在石墨膜封装结构中不可或缺。换热系数可影响散热性能,在其他散热影响因素无法再优化情况下,可通过增加换热系数提高散热效果。本文研究结果对高频、高功率密度、小尺寸功率器件封装热设计具有一定的参考和指导意义。 相似文献
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The function of an electronic cooling package is to dissipate heat to ensure proper operation and reliability. The flip chip ball grid array package is probably the most suitable package for high-level thermal performance applications. A high thermal performance flip chip ceramic ball grid array (FC-CBGA) package with an aluminum silicon carbide (AlSiC) lid and one without lid were evaluated using the computational fluid dynamics (CFD) technique. This paper compares the thermal performance of a 35 × 35 mm FC-CBGA package with three different die sizes of 5 × 5 mm, 15 × 15 mm and 20 × 20 mm. The performance of a lid fitted with different heat sinks was investigated in standard JEDEC defined natural and in forced convection environments. Thermal measurements were performed using a functional application specific integrated circuit (ASIC) chip, in compliance with the JEDEC standards. Excellent agreement was found between the numerical results and the measured data. Improved thermal performance was observed with a lidded package as compared to the unlidded one. However, no significant improvement was observed between lidded and unlidded packages when fitted with a heat sink subjected to forced convection. This paper also discusses the package thermal budget estimate with and without heat sinks. Printed circuit board and package top surface temperature patterns were measured using an infrared thermal camera. The usefulness of the thermal characterization parameter is demonstrated in system level applications. Parametric studies were carried out to understand the effect of die size, radiation effect, gird size variations and airflow rate on die junction temperature and package thermal resistance. This study also incorporates the effects of substrate, lid, die and PCB temperatures for different die sizes in natural and forced convection environments. 相似文献
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Heat spreading lids on a flip chip package can provide many thermal and mechanical advantages. Major drawbacks are higher module costs and potentially poorer thermal performance with a heat sink. This study compares thermal performance of direct lid attach (DLA) and bare die flip chip packages and addresses the roles of interface resistance and lid thickness. The IBM SLCTM package is tested and modeled. JEDEC standard wind tunnel tests as well as CFD models are used for analysis. The study reveals that the DLA design without additional heat sinking can provide significantly better thermal performance compared to the bare die package, depending on package size and airflow rate. With a heat sink the performance of the lidded package can be superior or inferior depending on interface resistance, lid design and the standard used for comparison. 相似文献
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This paper demonstrates the advantage of applying Predictive Engineering in the thermal assessment of a 279 inputs/outputs (I/Os), six-layer, depopulated array flip chip PBGA package. Thermal simulation was conducted using a computational fluid dynamics (CFD) tool to analyze the heat transfer and fluid flow in a free convection environment. This study first describes the modeling techniques on a multilayer substrate, thermal vias, solder bumps, and printed circuit board (PCB). For a flip chip package without any thermal enhancement, more than 90% of the total power was conducted from the front surface of the die through the solder ball interconnects to the substrate, then to the board. To enhance the thermal performance of the package, the heat transfer area from the backside of the die needs to increase dramatically. Several thermal enhancing techniques were examined. These methods included a copper heat spreader with various thicknesses and with thermal pads, metallic lid, overmolded with and without a heat spreader, and with heat sink. An aluminum lid and a heat sink gave the best improvement; followed by a heat spreader with thermal pads. Both methods reduced thermal resistance by an average of 50%. Detailed analyses on heat flow projections are discussed 相似文献
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Chong D. Y. R. Lim B. K. Rebibis K. J. Pan S. J. Sivalingam K. Kapoor R. Sun A. Y. S. Tan H. B. 《Advanced Packaging, IEEE Transactions on》2006,29(4):674-682
The recent advancement in high- performance semiconductor packages has been driven by the need for higher pin count and superior heat dissipation. A one-piece cavity lid flip chip ball grid array (BGA) package with high pin count and targeted reliability has emerged as a popular choice. The flip chip technology can accommodate an I/O count of more than five hundreds500, and the die junction temperature can be reduced to a minimum level by a metal heat spreader attachment. None the less, greater expectations on these high-performance packages arose such as better substrate real estate utilization for multiple chips, ease in handling for thinner core substrates, and improved board- level solder joint reliability. A new design of the flip chip BGA package has been looked into for meeting such requirements. By encapsulating the flip chip with molding compound leaving the die top exposed, a planar top surface can be formed. A, and a flat lid can then be mounted on the planar mold/die top surface. In this manner the direct interaction of the metal lid with the substrate can be removed. The new package is thus less rigid under thermal loading and solder joint reliability enhancement is expected. This paper discusses the process development of the new package and its advantages for improved solder joint fatigue life, and being a multichip package and thin core substrate options. Finite-element simulations have been employed for the study of its structural integrity, thermal, and electrical performances. Detailed package and board-level reliability test results will also be reported 相似文献
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建立了倒装陶瓷球栅阵列(flip chip ceramic ball grid array,FC-CBGA)封装的三维热模型。在5 W热负荷下,比较了裸芯片式、盖板式和盖板加装热沉三种情况下芯片的热性能,进而分析了有无热沉和不同空气流速下,盖板式封装的具体热流分配情况。结果表明:在自然对流下,与裸芯片式相比,采用盖板式能使芯片结点温度降低约16℃,盖板加装热沉能使芯片结温降低47℃。芯片产生的热量大部分向上流向盖板,且随着空气流速的增加比例增大;由芯片流向盖板的热量有相当大一部分经过侧面流向基板,且随着流速增大比例较小。 相似文献
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Robert Darveaux Lih-Tyng Hwang Arnold Reisman Iwona Turlik 《Journal of Electronic Materials》1989,18(2):267-274
Two-dimensional finite difference computer simulations were used for thermal analysis of an advanced multi-chip package design.
In order to model high performance VLSI and ULSI applications, power dissipations ranging from 10 to 40 W/cm2 on each chip and zero to 5 W/cm2 on the substrate were simulated. It was found that heating due to resistive losses in the thin film interconnections between
chips can impact package thermal performance. The calculated device-to-water thermal resistance was 0.4° C/W and the worst
case chip-to-chip temperature variation was less than 22° C. This excellent thermal performance illustrates the effectiveness
of the package’s water cooled heat sink with direct backside contact to each die. Methods to improve thermal performance are
discussed. 相似文献
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The effective model for the orthotropic TSV (Through Silicon Via) interposer in heat conduction for 2.5D IC integration was proposed in this study. The simple parallel model was used in out-of-plane direction to predict the effective thermal conductivity for the TSV interposer. The in-plane effective thermal conductivity for the interposer was derived on basis of heat balances. By introducing the effective orthotropic thermal parameters, the TSV structures can be ignored in the present effective model. The computations using the effective model for TSV interposer and the 2.5D package with interposer were carried out. The results showed that the accuracy of the effective model was above 95% comparing with the real model including TSV structures when the volume ratio of the electroplating copper and the silicon interposer is smaller than 10%. Using the effective model, the parametric studies on the interposer sizes and the thermal conductivities of different materials in the 2.5D package were conducted with higher efficiency. The results showed that the performance and sizes of EMC (Epoxy Molding Compound) and the package substrate are more important than that of internal underfills in heat dissipation of the package with TSV interposer. 相似文献
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In this paper, the cost of a light emitting diode (LED) package is lowered by using a silicon substrate as the base attached to the chip, in contrast to the conventional chip-on-board (COB) package. In addition we proposed an LED package with a new structure to promote reliability and lifespan by maximizing heat dissipation from the chip. We designed an LED package combining the advantages of COB based on conventional metal printed circuit board (PCB) and the merits of a silicon sub-mount as a substrate. When an input current 500–1000 mA was applied, the fabricated LED exhibited the light output of approximately 112 lm/W at 29 W. We also measured and compared the thermal resistance of the sub-mount package and conventional COB package. The measured thermal resistance of the sub-mount package with a reflective film of Ag and the COB package were 0.625 K/W and 1.352 K/W, respectively. 相似文献
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基于热电分离式设计理念,将AlN陶瓷片金属化后作为微散热器嵌入FR4材料内形成了复合散热基板.采用电镜扫描、光学显微,通过冷热循环冲击试验对FR4与AlN两相界面处在高低温突变情况下的界面形貌进行了分析.利用ANSYS软件对基板进行了仿真热模拟,研究了AlN嵌入后FR4导热性能的变化规律.利用结温测试仪、功率计和半导体制冷温控台等仪器设备,通过结温测试对比研究了该复合散热结构与金属芯印刷电路板(MCPCB)对大功率LED封装散热效果的影响.结果表明,该复合散热基板在经低温-55℃,高温125℃,1 000个冷热循环后,FR4和AlN界面无剥离现象发生,在环境温度急剧变化的条件下结合力良好.同时,FR4在嵌入AlN之后,导热性能得到了明显改善,且与MCPCB相比,能更有效降低LED芯片结温. 相似文献