Optimized 2.4 GHz voltage controlled oscillator with a high-Q MWCNT network-based pulse-shaped inductor

This paper focuses on the use of a high-Q Multi-Wall Carbon Nano-Tube (MWCNT)-based pulse-shaped inductor in the implementation of an LC differential voltage-controlled oscillator (LCVCO). The topology integrates a micro-scaled capacitor and a MWCNT network-based inductor together with the CMOS circuits. The CMOS circuits were designed to enhance the quality factor and to control the oscillation amplitude. The high quality factor of the inductor improves the overall quality factor and phase noise of the oscillator. The measurement results show that the LCVCO operates at 2.3982 GHz and achieves a phase noise of ?133.3 dBc/Hz at 1 MHz away from the carrier frequency. The VCO produces frequency tuning from 2.07 GHz to 2.77 GHz (29.16%) with an ultra low power consumption of 1.7 mW from a 0.6 V supply voltage. The output power level of the VCO is ?10 dBm, with an improved quality factor of 49.     

Floating active inductor based Class-C VCO with 8 digitally tuned sub-bands

A fully integrated floating active inductor based voltage-controlled oscillator (VCO) is presented. The active inductor employs voltage differencing transconductance amplifier (VDTA) as a building block. The designed VCO achieves frequency tuning by varying the bias current through the VDTA and utilizes a Class-C topology for improving the phase noise performance. The inductor-less VCO is designed and implemented in a 45-nm CMOS process and its performance is estimated using Virtuoso ADE of Cadence. Operating at a supply voltage of ±1 V, the proposed VCO consumes 0.44–1.1 mW corresponding to the oscillation frequency of 1.1–1.8 GHz thereby exhibiting a tuning range of 48.27%. The phase noise of the VCO lies in the range of −94.12 to −98.37 dBc/Hz at 1 MHz offset resulting in a FOM of −172.14 to −176.69 dBc/Hz.     

Wide-tuning-range,low-phase-noise quadrature ring oscillator exploiting a novel noise canceling technique

This paper presents a novel noise-canceling technique, which is used to improve the phase noise of a two-stage quadrature ring oscillator. The thermal noise canceling circuitry is used to cancel the channel thermal noise of the output transistors in each stage of the oscillator. Simulations using TSMC 0.13 μm CMOS technology show a wide frequency tuning range of 315 MHz to 6.64 GHz and ?97.5 dBc/Hz at 1 MHz offset from 4.7 GHz for changing supply from 0.5 V to 1.6 V. The power consumption is obtained to be 14.8 mW. The proposed oscillator can be used in applications such as ultra-wideband systems, and multiband and multimode receivers.     

High-resolution wide-band LC-VCO for reliable operation in phase-locked loops

This paper presents a novel sizing scheme to implement the array of switches in the capacitor bank of LC-VCOs for oscillation frequency coarse control. The proposed scheme allows increasing the number of elements in the capacitor bank beyond the values typically achieved by binary scaling, endowing the resulting LC-VCO with a wider tuning range and high frequency resolution, which is beneficial for the implementation of reliable phase-locked loops. Two different gigahertz LC-VCOs have been designed to validate the proposed scheme. The prototypes, fabricated in a cost-effective 0.18 μm CMOS process, cover a 700 MHz frequency range from 1.35 GHz to 2.05 GHz and from 2.05 GHz to 2.75 GHz, respectively, with a phase noise figure of − 122 dBc/Hz and − 119.5 dBc/Hz at 1 MHz from the mid-range carriers, and a power consumption of 18 mW. These figures result in a respective FOM_T of − 186.4 dBc/Hz and − 183.8 dBc/Hz. The performance of the fabricated LC-VCOs is achieved in each case with a dense coarse tuning range of 128 levels, which allows, respectively, a fine tuning gain smaller than 40 MHz V^− 1.     

Oscillation-controlled CMOS ring oscillator for wireless sensor systems

This paper presents a ring oscillator with the function of the oscillation controlled for wireless sensor systems (WSSs). The proposed oscillator consists of a NAND gate, 4 inverters, and 1-, 3-, 9-times buffer stage. Operation of it is controlled by the NAND gate. The oscillator can reduce the power loss because the oscillator is oscillated during only high level input. The proposed oscillator was designed and fabricated by 2.5 μm CMOS technology, through which it is possible to realize a WSS on a single chip because a sensor and an oscillator can be fabricated concurrently.The frequency tuning range of the oscillator was found to be approximately 90–152 MHz and the output power of the oscillator was ?8.42 dBm. The measured phase noise is ?99.35 and ?102.59 dBc/Hz at 1 and 5 MHz offsets, respectively, from the carrier of 152 MHz. Power consumption of the oscillator is determined by the duty cycle of the input signal pulse, and the range of power consumption was measured as 1.5–45 mW at the duty cycle of 1.0.     

A 5-GHz LC VCO with digital AAC and AFBS for 2.4 GHz ZigBee transceiver applications

A 5 GHz LC VCO (voltage-controlled oscillator) with automatic amplitude control (AAC) and automatic frequency-band selection (AFBS) for 2.4 GHz ZigBee transceivers is presented. Instead of continuous feedback loop, an alternative amplitude calibration scheme is proposed in this paper to alleviate the deficiencies inherent in the conventional approach. It helps to keep the VCO at optimum amplitude to avoid saturation of the cross-coupled transistors and therefore stabilizes the phase noise performance over process, voltage and temperature variations. For the ZigBee application with 16 frequency channels, a coarse tuning loop is added in this work to implement the frequency-band selection using the AFBS mechanism. The VCO core and the digital AAC, AFBS modules have been fully integrated in a 2.4 GHz ZigBee transceiver which was fabricated in a 0.18 μm RF-CMOS technology. The current consumption is 4.7 mA at 4.85 GHz with 1.8 V power supply and a chip area of about 0.285 mm² is occupied. The VCO is capable of operating from 4.67 GHz to 5.18 GHz and the measured phase-noise level is –120 dBc/Hz at 1 MHz offset from a 4.85 GHz carrier. The tuning sensitivity K_VCO of the VCO is about 78 MHz/V with 0.9 V control voltage.     

A low-power wide tuning-range CMOS current-controlled oscillator

This paper presents a low-power, small-size, wide tuning-range, and low supply voltage CMOS current-controlled oscillator (CCO) for current converter applications. The proposed oscillator is designed and fabricated in a standard 180-nm, single-poly, six-metal CMOS technology. Experimental results show that the oscillation frequency of the CCO is tunable from 30 Hz to 970 MHz by adjusting the control current in the range of 100 fA to 10 µA, giving an overall dynamic range of over 160 dB. The operation of the circuit is nearly independent of the power supply voltage and the circuit operates at supply voltages as low as 800 mV. Also, at this voltage, with control currents in the range of sub-nano-amperes, the power consumption is about 30 nW. These features are promising in sensory and biomedical applications. The chip area is only 8.8×11.5 µm².     

A tunable CMOS Wilkinson power divider using active inductors

This paper presents the design and implementation of a tunable CMOS Wilkinson power divider using active inductors. Compared to a conventional active inductor topology, the proposed active inductor features higher inductance tuning range, higher self-resonant frequency, and lower power consumption by introducing two additional transistors. Benefitting from the superior inductor, the low-loss Wilkinson power divider is practical while maintaining a wide tuning range. The design consuming 10.2 mW demonstrates an insertion loss of 0.67 dB, a return loss of 27 dB, and an isolation of 22.6 dB at 8 GHz. Moreover, the tuning range of the circuit is between 5.8 GHz and 10.4 GHz, rendering a 4.6 GHz bandwidth. The active chip size of the lumped design is merely 0.25 mm × 0.15 mm.     

Common-base multi-finger submicron InGaAs/InP double heterojunction bipolar transistor with fmax of 305 GHz

A layout of a common-base four-finger InGaAs/InP double heterostructure bipolar transistor (DHBT) has been designed and the corresponding DHBT has been fabricated successfully by using planarization technology. The area of each emitter finger was 1 × 15 μm². The breakdown voltage was more than 7 V, the current could be more than 100 mA. The maximum output power can be more than 80 mW derived from the DC characteristics. The maximum oscillation frequency was as high as 305 GHz at I_C = 50 mA and V_CB = 1.5 V. The DHBT is thus promising for the medium power amplifier and voltage controlled oscillator (VCO) applications at W band and higher frequencies.     

0.8 V PLL-based automatic frequency tuning system for current-mode filters

A wide-range automatic frequency tuning system for current-mode filters is proposed in this paper. The cutoff frequency of the tunable filter is controlled by an external reference signal and is locked in the desired frequency through a current-mode based phase locked loop (PLL) circuit. Although the PLL operates in a relatively narrow band, the total tuning range of the topology is extended by interpolating an automatic frequency detector after the reference input and before the PLL. The use of current controlled oscillator, based on same blocks with those in the filter, offers accuracy and feasible design in the control path. The topology has been simulated using MOS transistor models for a 130 nm CMOS technology in 0.8 V supply voltage. The achieved overall automatic tuning range was from 2.3 MHz to 660 MHz.     

Impact of technology scaling on the tuning range and phase noise of mm-wave CMOS LC-VCOs

The impact of CMOS technology scaling, on the tuning range and phase noise performance of mm-wave LC voltage controlled oscillators (LC-VCOs) is presented. As a preliminary step, the fundamental LC-VCO elements (i) tank inductor, (ii) fixed and variable capacitor elements, and (iii) cross-coupled transistor pair are analytically modeled across the frequency range 10–50 GHz. These models are then exploited to analyze the tuning range and phase noise revealing the ultimate performance bounds for simultaneously achieving low phase noise and wide tuning range in mm-wave CMOS LC-VCOs across the CMOS technology scaling (from 130 nm down to 45 nm) are explored. The analysis demonstrates the improvement of the maximum achievable tuning range, phase noise, and figures-of-merit (FoM and FoM_T) with the technology down scaling. Finally, the performance trend of the mm-wave CMOS LC-VCOs implemented using both thin and thick gate cross-coupled pair is compared. The analysis indicates that thick gate cross-coupled pair VCOs achieve better phase noise at the expense of power consumption and maximum tuning range.     

A low phase noise and low power 3–5 GHz frequency synthesizer in 0.18 µm CMOS technology

A low power frequency synthesizer for WLAN applications is proposed in this paper. The NMOS transistor-feedback voltage controlled oscillator (VCO) is designed for the purpose of decreasing phase noise. TSPC frequency divider is designed for widening the frequency range with keeping low the power consumption. The phase frequency detector (PFD) with XOR delay cell is designed to have the low blind and dead zone, also for neutralizing the charge pump (CP) output currents; the high gain operational amplifier and miller capacitors are applied to the circuit. The frequency synthesizer is simulated in 0.18 µm CMOS technology while it works at 1.8 V supply voltage. The VCO has a phase noise of −136 dBc/Hz at 1 MHz offset. It has 10.2% tuning range. With existence of a frequency divider in the frequency synthesizer loop the output frequency of the VCO can be divided into the maximum ratio of 18. It is considered that the power consumption of the frequency synthesizer is 4 mW and the chip area is 10,400 µm².     

Josephson array oscillator with microstrip resonators for submillimeter wave region

Shunted tunnel junctions with a small parasitic inductance have been developed for improving the operating frequency of Josephson array oscillators. The inductance was minimized by reducing the inductive length to 1 μm and was estimated to be about 40 fH. The analysis of resonant properties for the shunted junctions gave a high resonant frequency up to 1.4 THz. Josephson array oscillators were designed and fabricated to operate at near Nb gap frequency (700 GHz) using 11 shunted Nb/AlOx/Nb tunnel junctions with Nb microstrip resonators. Shapiro steps induced by Josephson oscillation were clearly observed above the Nb gap frequency (up to 830 GHz). By fitting the step height to the simulation result using the RLCSJ model, the output power of the Josephson oscillator to the load resistor was estimated to be about 0.1 μW at 680 GHz.     

CMOS balanced regenerative frequency dividers for wide-band quadrature LO generation

CMOS regenerative frequency dividers, based on a fully balanced Gilbert cell, are analyzed in this paper for quadrature local oscillator (LO) signal generation. Driven in opposite phase by double frequency signals, they provide quadrature waveforms while simultaneously driving large mixers LO input capacitances, thereby avoiding power hungry buffers typically required. Experimental results, carried out on 0.18 μm CMOS prototypes, show 68% bandwidth around 2 GHz center frequency, with a quadrature accuracy better than 1°, making them suitable for multi-standard wireless receivers. To keep the output amplitude constant while simultaneously minimizing the average power consumption, a digital calibration loop regulates each divider biasing current.     

Low-power CMOS LC QVCO using zero-biased transistor coupling of MWCNT network-based VCO structure

This paper presents design, analysis and implementation of a 2.4 GHz QVCO (Quadrature Voltage Controlled Oscillator), for low-power, low-voltage applications. Cross coupled LC VCO (Inductor–Capacitor Voltage Controlled Oscillator) topology realized using integration of a micro-scaled capacitor and a MWCNT (Multi-Wall Carbon Nano-Tube) network based inductor together with the CMOS circuits is utilized together with MOS transistors as coupling elements to realize QVCO. With the passive coupling achieved from the MOS transistors, power consumption is minimized while maintaining a small chip area. The variable capacitors and the inductors are designed using ANSYS and imported through DAC components in ADS (Advanced Design software). Accurate simulation of the QVCO is performed in the software environments and the results are provided. The measurement results show that the QVCO provides quadrature signals at 2.4 GHz and achieves a phase noise of −130 dBc/Hz 1 MHz away from the carrier frequency. The VCO produces frequency tuning from 2.1 GHz to 2.60 GHz (20.83%) with a control voltage varying from 0 to 0.3 V. It achieves a peak to peak voltage of 0.59 V with an ultra low power consumption of 3.8 mW from a 0.6 V supply voltage. The output power level of the QVCO is −10 dBm, with an improved quality factor of 45. The phase error of the QVCO is measured as 3.1°.     

Improving linearity in MOS varactor based VCOs by means of the output quiescent bias point

This paper presents a CMOS based LC tank VCO topology improving the tuning range linearity. The VCO tuning range is linearized with PMOS varactors which remain in the inversion region for an extended range of the control voltage. This is achieved with the design of the quiescent operating point in the VCO's output nodes with a value close to the voltage rails, letting the varactors to behave quasi linearly in the achievable VCO tuning range. The experimental results of a VCO in a CMOS 0.35 µm process show a linear tuning range improvement of 75% of the control voltage in the (1.43–1.55) GHz range, with a minimum VCO gain variation compared to similar architectures. The results show a phase noise improvement from −94 dBc/Hz to −124 dBc/Hz @600 kHz offset from the carrier with an overall reduced amplitude noise for the VCO.     

Integration of a graphene ink as gate electrode for printed organic complementary thin-film transistors

We demonstrate a new electrode gate based on graphene ink for complementary printed organic metal oxide semiconductor (CMOS) technology on flexible plastic substrates. The goal is to replace the standard silver electrode gate. Devices made with graphene were enhanced and showed a high field-effect mobility of 3 cm² V⁻¹ s⁻¹ for P-type and 0.9 cm² V⁻¹ s⁻¹ for the N-type semiconductors. The improvement is attributed to the increase of the electrical capacitance of the organic dielectric (CYTOP) due to the graphene layer. A seven-stage ring oscillator was made with high oscillation frequencies of 2.1 kHz at 40 V corresponding to a delay/gate value of 34 μs. These performances are promising for use of low cost printed electronic applications.     

A UWB CMOS low-noise amplifier with noise reduction and linearity improvement techniques

In this paper, a highly linear CMOS low noise amplifier (LNA) for ultra-wideband applications is presented. The proposed LNA improves both input second- and third-order intercept points (IIP2 and IIP3) by canceling the common-mode part of all intermodulation components from the output current. The proposed LNA structure creates equal common-mode currents with the opposite sign by cascading two differential pairs with a cross-connected output. These currents eliminate each other at the output and improve the linearity. Also, the proposed LNA improves the noise performance by canceling the thermal noise of the input and auxiliary transistors at the output. Detailed analysis is provided to show the effectiveness of the proposed LNA structure. Post-layout circuit level simulation results using a 90 nm RF CMOS process with Spectre-RF reveal 9.5 dB power gain, -3 dB bandwidth (BW_−3dB) of 8 GHz from 2.4 GHz to 10.4 GHz, and mean IIP3 and IIP2 of +13.1 dBm and +42.8 dBm, respectively. The simulated S₁₁ is less than −11 dB in whole frequency range while the LNA consumes 14.8 mW from a single 1.2 V power supply.     

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control

This paper presents novel low-cost CMOS temperature sensor for controlling the self-refresh period of a mobile DRAM. In the proposed temperature sensor, the temperature dependency of poly resistance is used to generate a temperature-dependent bias current, and a ring oscillator driven by this bias current is employed to obtain the digital code pertaining to on-chip temperature. This method is highly area-efficient, simple and easy for IC implementation as compared to traditional temperature sensors based on bandgap reference. The proposed CMOS temperature sensor was fabricated with an 80 nm 3-metal DRAM process, which occupies extremely small silicon area of only about 0.016 mm² with under 1 μW power consumption for providing 0.7 °C effective resolution at 1 sample/s processing rate. This result indicates that as much as 73% area reduction was obtained with improved resolution as compared to the conventional temperature sensor in mobile DRAM.     

Microwave properties and applications of Y–Ba–Cu–O thin films grown on various substrates

Microwave properties of YBa₂Cu₃O_7-δ (YBCO) films grown on (100) LaAlO₃ (LAO), (110) NdGaO₃ (NGO) and (001) SrLaAlO₄ (SLAO) substrates were studied in the form of a microstrip ring resonator at temperatures above 20 K. The YBCO resonator on a SLAO substrate showed microwave properties better than or comparable to other YBCO resonators on LAO substrates. For the YBCO resonators on LAO and SLAO substrates, both Q_U and f₀ appeared to decrease as the temperature was raised. Meanwhile the resonator on a NGO substrate showed different behaviors with Q_U showing a peak at ∼70 K, which are attributed to the unique temperature dependence of the loss tangent of the NGO substrate. An X-band oscillator with a YBCO ring resonator coupled to the circuit was prepared and its properties were investigated at low temperatures. The frequency of the oscillator signal appeared to change from 7.925 GHz at 30 K to 7.878 GHz at 77 K, which was mostly attributed to the change in f₀ of the YBCO ring resonator. The signal power appeared to be more than 4.5 mW at 30 K and 2.1 mW at 77 K, respectively. At 55 K, the frequency of the oscillator signal was 7.917 GHz with the 3 dB-linewidth of 450 Hz.