Current status of large-area MOVPE growth of HgCdTe device heterostructures for infrared focal plane arrays

This paper reviews the current status of the growth of fully doped HgCdTe (MCT) devices by metalorganic vapor phase epitaxy (MOVPE). The current reactor system has been developed to produce 3-inch diameter epitaxial layers compatible with slice-scale processing. The new reactor system has achieved routine epitaxial growth of MCT with good morphology onto both gallium arsenide (GaAs) and GaAs on silicon (Si) wafers that were oriented (2–8°) off (100) orientation. The density of surface defects (so-called “hillocks”), typical of MOVPE growth on such orientation substrates, has been reduced to <5 cm⁻² at a sufficient yield to make the production of low cluster defect 2D arrays possible. Alternative growth experiments onto cadmium telluride (CdTe) on Si substrates with (211)B orientation have also been performed to investigate their usefulness for infrared focal plane array (IRFPA) applications. Si substrates give better thermal expansion match to the read out Si circuits (ROIC). The horizontal reactor cell design has a graphite susceptor with a rotating platen capable of using substrates up to 4-inch diameter. Work, however, has concentrated on 3-inch diameter GaAs and GaAs on Si wafers substrates in the reactor, and these reproducibly demonstrated good compositional and thickness uniformity. Cut-off wavelength and thickness uniformity maps showed that there was sufficient uniformity to produce twelve sites of large format 2D arrays (640×512 diodes on 24-μm pitch) per slice. Minority carrier lifetimes in heterostructures is an important parameter and some factors affecting this are discussed, with special emphasis on As-doped material grown under various growth conditions in an attempt to reduce Shockley-Read (S-R) trap densities. New data are presented on trap densities and theoretical fitting of lifetimes in MOVPE material. Fully doped heterostructures have been grown to investigate the device performance in the 3–5 μm medium-wave IR (MWIR) band and 8–12 μm long-wave IR (LWIR). These layers have been fabricated into mesa arrays and then indium-bumped onto Si multiplexers. A summary of the 80-K device results shows that state-of-the-art device performance has been demonstrated in MOVPE-grown device structures.     

第三代红外焦平面基础技术的研究进展

叙述了围绕第三代红外焦平面的需求所进行的HgCdTe分子束外延以及台面结芯片技术研究的一些成果。对GaAs、Si基大面积异质外延、p型掺杂以及台面刻蚀等主要难点问题进行了阐述。研究表明，7.6 cm(3 in)材料的组分均匀性良好，晶格失配引发的孪晶缺陷可以通过合适的低温成核方法得到有效抑制。在GaAs和Si衬底上外延的HgCdTe材料的(422)X射线衍射半峰宽的典型值为55″~75″。对ICP技术刻蚀HgCdTe的表面形貌、刻蚀速率、反应微观机理、负载效应和刻蚀延迟效应以及刻蚀损伤进行了研究，得到了高选择比的掩模技术和表面光亮、各向异性较好的刻蚀形貌。采用HgCdTe多层材料试制了长波n?蛳on?蛳p以及p?蛳on?蛳n型掺杂异质结器件以及双色红外短波/中波焦平面探测器，取得了一些初步结果。     

Multi-wafer growth of highly uniform InGaP/GaAs by low pressure MOVPE

This paper reports on the large area growth of InGaP/GaAs heterostructures for short wavelength applications (λ ∼ 650 nm) by low pressure MOVPE in a vertical, high speed, rotating disk reactor. Highly uniform films were obtained both on a single 50 mm diam wafer at the center of a 5 inch diam wafer platter and on three, 50 mm diameter GaAs wafers symmetrically placed on a 5 inch diam platter. Characterization was performed by x-ray diffraction, SEM, and room temperature photoluminescence (PL) mapping. For the single wafer growth, PL mapping results show that the total range on wavelength was ±2 nm with a 2 mm edge exclusion. The standard deviation of the peak wavelength,σ _w , is 0.7 nm. Thickness uniformity, measured by SEM, is less than 2%. Similar results were obtained for the multi-wafer runs. Each individual wafer has aσ _w of 1.1 nm. The wafers have nearly identical PL maps with the variation of the average wavelength from the three wafers within ±0.1 nm.     

Material quality characterization of CdZnTe substrates for HgCdTe epitaxy

Cd_1−xZn_xTe (CZT) substrates were studied to investigate their bulk and surface properties. Imperfections in CZT substrates affect the quality of Hg_1−xCd_xTe (MCT) epilayers deposited on them and play a role in limiting the performance of infrared (IR) focal plane arrays. CZT wafers were studied to investigate their bulk and surface properties. Transmission and surface x-ray diffraction techniques, utilizing both a conventional closed-tube x-ray source as well as a synchrotron radiation source, and IR transmission micro-spectroscopy, were used for bulk and surface investigation. Synchrotron radiation offers the capability to combine good spatial resolution and shorter exposure times than conventional x-ray sources, which allows for high-resolution mapping of relatively large areas in an acceptable amount of time. Information on the location of grain boundaries and precipitates was also obtained. The ultimate goal of this work is to understand the defects in CZT substrates and their effects on the performance and uniformity of MCT epilayers and then to apply this understanding to produce better infrared detectors.     

Double pulse doped InGaAs/AlGaAs/GaAs pseudomorphic high-electron-mobility transistor heterostructures

Double pulse doped (δ-doped) InGaAs/AlGaAs/GaAs pseudomorphic high-electron-mobility transistor (HEMT) heterostructures were grown by molecular-beam epitaxy using a multiwafer technological system. The room-temperature electron mobility was determined by the Hall method as 6550 and 6000 cm²/(V s) at sheet electron densities of 3.00 × 10¹² and 3.36 × 10¹² cm⁻², respectively. HEMT heterostructures fabricated in a single process feature high uniformity of structural and electrical characteristics over the entire area of wafers 76.2 mm in diameter and high reproducibility of characteristics from process to process.     

Effect of silicon on relaxation of the crystal lattice in MOCVD–hydride Al<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript>Ga<Subscript>1 − <Emphasis Type="Italic">x</Emphasis></Subscript>As:Si/GaAs(100) heterostructures

The X-ray diffraction and infrared spectroscopy data for MOCVD-hydride Al _x Ga_{1 − x} As:Si/GaAs(100) heterostructures and homoepitaxial GaAs:Si/GaAs(100) structures doped with Si to a content of up to ∼1 at % are reported. It is shown that, in the homoepitaxial heterostructures, the formation of alloys with Si yields a decrease in the crystal lattice parameters of the epitaxial layer and a negative lattice mismatch with the single-crystal substrate (Δa < 0). At the same time, the formation of quaternary alloys in the Al _x Ga_{1 − x} As:Si/GaAs(100) heterostructures is not accompanied by any pronounced strains in the crystal lattice. By introducing Si into the epitaxial layers of these heterostructures, it is possible to attain complete matching of crystal lattice parameters of the film and substrate in the appropriately chosen technological conditions of growth of the epitaxial layers.     

Growth of long wavelength infrared MCT emitters on conductive substrates

Uncooled operation of Auger suppressed fully doped mercury cadmium telluride (MCT) devices designed by Ashley and Elliott¹ and grown by metalorganic vapor phase epitaxy (MOVPE) by Maxey et al.² has been demonstrated. These devices also demonstrate efficient negative luminescent emission in the long wavelength infrared (LWIR) spectra.³ However, to operate a large area device (>1 cm²) requires a large current (∼10 A), and consequently, it is critical that the series resistance is minimized. To increase optical efficiency, deep optical concentrators are needed. Similar InSb molecular beam epitaxy (MBE) devices utilize a highly doped InSb substrate which allows a conduction path into the substrate with reduced series resistance and acts as an optical window (due to Moss-Burstein shift) allowing transmission of the 6 m IR emission. A suitable high conductivity substrate for MCT emitter devices is required to have a sheet resistivity of <1 /□. The conventional MCT epitaxy substrates are CdZnTe and GaAs. High conductivity cadmium zinc telluride (CZT) was not found to be commercially available. Although high conductivity, n-type GaAs is available, the maximum doping is limited by the degree of free carrier absorption in the LWIR which would reduce the potential emitter efficiency. This paper describes a novel investigation into achieving working LW emitter devices with deep mesas in which the current is carried by the GaAs substrate. The key issue which had to be addressed was obtaining conduction between the II/VI and III/V materials. A variety of interface designs was investigated but the best results were achieved by minimizing the band-gap of the interfacial II/VI MCT and optimizing the properties of the top region of the GaAs substrate.     

Metal-organic vapor-phase epitaxy growth and characterization of thick (100) CdTe layers on (100) GaAs and (100) GaAs/Si substrates

The growth characteristics and crystalline quality of thick (100) CdTe-epitaxial layers grown on (100) GaAs and (100) GaAs/Si substrates in a metal-organic vapor-phase epitaxy (MOVPE) system for possible applications in x-ray imaging detectors were investigated. High-crystalline-quality epitaxial layers of thickness greater than 100 μm could be readily obtained on both types of substrates. The full width at half maximum (FWHM) values of the x-ray double-crystal rocking curve (DCRC) decreased rapidly with increasing layer thickness, and remained around 50–70 arcsec for layers thicker than 30 μm on both types of substrates. Photoluminescence (PL) measurement showed high-intensity excitonic emission with very small defect-related peaks from both types of epilayers. Stress analysis carried out by performing PL as a function of layer thickness showed the layers were strained and a small amount of residual stress, compressive in CdTe/GaAs and tensile in CdTe/GaAs/Si, remained even in the thick layers. Furthermore, the resistivity of the layers on the GaAs substrate was found to be lower than that of layers on GaAs/Si possibly because of the difference of the activation of incorporated impurity from the substrates because of the different kinds of stress existing on them. A heterojunction diode was then fabricated by growing a CdTe epilayer on an n⁺-GaAs substrate, which exhibited a good rectification property with a low value of reverse-bias leakage current even at high applied biases.     

Structural and electrical properties of unintentionally doped 4H-SiC epitaxial layers—Grown by hot-wall CVD

This paper focuses on growth of 4H−SiC epitaxial layers using the hot-wall CVD technique. The relation between the growth regime like total flow, system pressure, C/Si ratio and growth temperature and the characteristics of nominally undoped epilayers, such as thickness uniformity and background doping concentration have been investigated. The epitaxial layers were investigated by optical microscopy, capacitance-voltage measurements, x-ray rocking curve maps, electron channelling patterns and secondary ion mass spectroscopy. Layers up to 40 μm in thickness with a variation of about ±4% and with residual n-type doping levels in the low 10¹⁴ cm⁻³ ranges have been obtained on Si faces wafers. SIMS measurements have shown that the impurity concentration of acceptors like B and Al is below 2×10¹⁴ cm⁻³.     

InGaAs/GaAs structures with quantum dots in vertical optical cavities for wavelengths near 1.3 µm

Semiconductor heterostructures with vertical optical cavities with active regions, based on arrays of InAs quantum dots inserted in an external InGaAs quantum well, have been obtained by molecular-beam epitaxy on GaAs substrates. The dependences of the reflection and photoluminescence spectra on the structural characteristics of the active region and optical cavities have been investigated. The proposed heterostructures are potentially suitable for optoelectronic devices at wavelengths near 1.3 μm. Fiz. Tekh. Poluprovodn. 33, 629–633 (May 1999)     

Lateral compositional modulation in lattice-matched GaInP/GaAs heterostructures

High-resolution transmission electron microscopy has been employed to study the microstructure of GaAs lattice-matched GaInP heterostructures grown by solid source molecular beam epitaxy. It is found that the GaInP epilayers undergo lateral compositional modulation at a growth temperature of 520°C. The modulating spacing is irregular, varying between 5.0–15.0 nm. The compositional difference in the two decomposed phases is estimated between 0.14–2.1 at.%, which is far from thermal equilibrium. High-resolution TEM observation shows that, corresponding to the contrast modulation, there exist considerable lattice distortions nearly parallel to the growth direction inside the GaInP epilayers. In the distorted regions, dislocations of 60°-type are frequently observed. Factors that may contribute to the compositional modulation are discussed.     

LPE HgCdTe on sapphire status and advancements

With the evolution of infrared arrays to over four million pixels, larger formats have demanded higher quality mercury cadmium telluride (MCT) wafers. Since single defects can easily degrade multiple diodes, high operability requires very homogeneous and nearly flawless epitaxial surfaces. Subsequent photolithography and hybridization also demand unprecedented levels of substrate flatness and low imperfections. To consistently and reliably produce large area arrays, Insaco Inc., The Boeing Company, and Rockwell International Corporation have developed major quality improvement procedures which address all three components of the infrared material wafer architecture. Centered on the producible alternative to cadmium telluride for epitaxy (PACE) process, technological advancements encompassed sapphire substrates, organometallic vapor phase epitaxy (OMVPE), cadmium telluride (CdTe) buffer layer growth, and liquid phase epitaxial (LPE) mercury cadmium telluride growth. Processed material from these runs mated to Conexant^™ fabricated multiplexers have successfully produced 1024 1024 and the first 2048 2048 IR short-wave (2.5 m at 80 K) hybrid focal plane arrays. Operabilities in these implanted n-on-p junction devices reach 99.98% with near 70% quantum efficiency in the astronomy ‘K’ band (2.2–2.4 microns).     

Precise wavelength control for DFB laser diodes by novel corrugation delineation method

Precise wavelength control of a multiple-wavelength DFB InGaAsP strained MQW laser-diode (LD) array was achieved using weighted-dose allocation variable-pitch EB-lithography (WAVE) and highly uniform MOVPE. Multiple-wavelength 1.3 /spl mu/m /spl lambda//4-shifted DFB LD arrays with wavelength spacing of 2.0 nm were successfully demonstrated. The standard deviation of the wavelength was as low as 0.37 nm over 2-in wafers.     

Thermomigration of Te precipitates and improvement of (Cd,Zn)Te substrate characteristics for the fabrication of LWIR (Hg,Cd)Te photodiodes

(Cd,Zn)Te wafers containing Te precipitates have been annealed under well defined thermodynamic conditions at temperatures below and above the melting of Te. Results of the examination of the wafers with infrared microscopy before and after the anneals indicate a substantial reduction of the Te precipitates in wafers annealed at temperatures in excess of the melting point of Te compared with those annealed at temperatures below the melting point of Te. These results confirm the thermomigration of liquid Te precipitates to be the principally operative mechanism during annealing in the elimination of these precipitates in (Cd,Zn)Te wafers. The occurrence of Te precipitates in (Hg,Cd)Te epitaxial layers grown on (Cd,Zn)Te substrates containing Te precipitates is also explained on the basis of thermomigration of these precipitates during LPE growth from the substrates to the epilayers. Absence of occurrence of Te precipitates in (Hg,Cd)Te epilayers grown on annealed (Cd,Zn)Te substrates with negligible Te precipitates is also confirmed. Usefulness of annealing (Cd,Zn)Te substrates—to eliminate Te precipitates—prior to epilayer growth is confirmed via demonstration of improved long wavelength infrared (Hg,Cd)Te device array performance uniformity in epitaxial layers grown on (Cd,Zn)Te substrates with negligible Te precipitates after annealing.     

The growth of GaAs,AIGaAs, InP and InGaAs by chemical beam epitaxy using group III and V alkyls

The growth kinetics of chemical beam epitaxy (CBE) were investigated with the growth of GaAs, AIGaAs, InP, and InGaAs. Results obtained with epilayers grown by using trimethylarsine (TMAs) and triethylphosphine (TEP) instead of arsine (AsH3) and phosphine (PH₃) were reviewed with some additional results. The CBE grown epilayers have similar optical quality to those grown by molecular beam epitaxy (MBE). Superlattices of GaAs/AlGaAs with abrupt interfaces have been prepared. Since trimethylindium (TMIn) and triethylgallium (TEGa) used in the growth of InGaAs emerged as a single mixed beam, spatial composition uniformity was automatically achieved without the need of substrate rotation in the InGaAs epilayers grown. Lattice-mismatch Δα/α< 1 x 10^-3 have been reproducibly obtained. For epilayers grown with high purity TMAs source, room-temperature electron mobility as high as 9000 cm²/V sec and concentrations of ˜7 x 10¹⁵ cm^-3 were produced. In general, the electron mobilities were as good as those obtained from low-pressure metalorganic chemical vapor deposition. (MO-CVD). Unlike MBE, since the In and Ga were derived by the pyrolysis of TMIn and TEGa molecules at the heated substrate surface, respectively, oval defects observed in MBE grown epilayers due to Ga splitting from Ga melt were not present in CBE grown epilayers. This is important for integrated circuit applications. Unlike MO-CVD, the beam nature of CBE allows for selective area growth of epilayers with well-defined smooth edges using mask shadowing techniques. Typically, growth rates of 2-5μm/h for InP, 2-6μm/h for GaAs and AIGaAs, and 2-5μm/h for InGaAs were used.     

Design and fabrication of AlGaInP LED array with integrated GaAsdecode circuits

A two-dimensional (2-D) AlGaInP light-emitting diode (LED) array with monolithic integration of one-to-four GaAs MESFET decode circuits has been developed as an image source for portable virtual displays. The epitaxial layers of AlGaInP LEDs with light emission at a wavelength of 605 nm were grown on a semi-insulating GaAs substrate by organometallic vapor phase epitaxy. LED arrays consisting of 240 columns and 144 rows for a total of 34560 pixels were then fabricated on such epitaxial wafers. One-to-four GaAs MESFET decode circuits consisting of eight MESFET's for each decode circuit and a total of 768 MESFET's for a 34 K decode array were fabricated on the semi-insulating GaAs substrate with removal of LED epitaxial layers around the periphery of the LED array. LED arrays with the integrated decode circuits provide a great reduction in I/O terminals. The I/O count of the demonstrated 34 K decode LED array is 104, which is much less than 384 for a comparable array without the integrated decode circuits. The pixel pitch of the LED array is 20 μm and each LED pixel has 10×10 μm² emitting area. The output power of LED pixel is 50 nW at an operation current of 50 μA. The address voltages used to activate the column decode circuits are 3 V for high and -3 V for low, while the address voltages used to activate the row decode circuits are 0 V for high and -3 V for low. The operating voltage of the decode LED array ranges from 3 to 5 V, and the total power dissipation of the decode LED array is less than 16 mW     

Comparison of electrical and atomic profiles of Mg24 and Zn64 implanted gaas samples and GaAs-GaAIAs heterostructures for bipolar transistor applications

The aim of this work is to study the electrical properties of Mg²⁴ and Zn⁶⁴ implanted and annealed samples (semi-insulating GaAs substrates,n ⁺ doped GaAs epilayers, GaAs-GaAlAs heterostructures) with the final objective of realizing the contact region for the p-type base layer of heterojunction bipolar transistor (HBT). We show that, for HBT applications, Mg⁺ is a more suitable candidate because its characteristics (depth, concentration) are easier to control: they are not very sensitive to doping level and composition of different layers. Low specific contact resistivity (<10^-5Ωcm²) have been obtained with Au-Mn alloy on Mg⁺ implanted GaAs.     

Use of electron cyclotron resonance plasmas to prepare CdZnTe (211)B substrates for HgCdTe molecular beam epitaxy

Without any additional preparation, Cd_1−yZn_yTe (211)B (y∼3.5%) wafers were cleaned by exposure to an electron cyclotron resonance (ECR) Ar/H₂ plasma and used as substrates for HgCdTe molecular beam epitaxy. Auger electron spectra were taken from as-received wafers, conventionally prepared wafers (bromine: methanol etching, followed by heating to 330–340°C), and wafers prepared under a variety of ECR process conditions. Surfaces of as-received wafers contained ∼1.5 monolayers of contaminants (oxygen, carbon, and chlorine). Conventionally prepared wafers had ∼1/4 monolayer of carbon contamination, as well as excess tellurium and/or excess zinc depending on the heating process used. Auger spectra from plasma-treated CdZnTe wafers showed surfaces free from contamination, with the expected stoichiometry. Stoichiometry and surface cleanliness were insensitive to the duration of plasma exposure (2–20 s) and to changes in radio frequency input power (20–100 W). Reflection high energy electron diffraction patterns were streaked indicating microscopically smooth and ordered surfaces. The smoothness of plasma-etched CdZnTe wafers was further confirmed ex situ using interferometric microscopy. Surface roughness values of ∼0.4 nm were measured. Characteristics of HgCdTe epilayers deposited on wafers prepared with plasma and conventional etching were found to be comparable. For these epilayers, etch pit densities on the order of 10⁵ cm⁻² have been achieved. ECR Ar/H₂ plasma cleaning is now utilized at Night Vision and Electronic Sensors Directorate as the baseline CdZnTe surface preparation technique.     

VPE growth of high purity and high uniformity InGaAs/InP epilayers on InP

PIN and avalanche photodiodes are vital component parts of today's optical communication systems. For these, InP/InGaAs/InP heteroepitaxial structures are required. To improved the quality and yield of these devices, the epitaxial wafers must be of very high purity and uniformity. At Sumitomo Electric we have grown the above mentioned epitaxial layers by the chloride VPE method, which is safe and has a usefully high growth rate. This article describes the growth technique and the characterization of high uniformity and high purity InGaAs/InP epilayers.     

Microstructural Characterization of CdTe Surface Passivation Layers

The microstructure of CdTe (CT) surface passivation layers deposited on HgCdTe (MCT) heterostructures has been evaluated using transmission electron microscopy (TEM). The MCT heterostructures were grown by liquid-phase epitaxy and consisted of thick (approximately 10 μm to 20 μm) n-type MCT layers and thin (approximately 1 μm to 3 μm) p-type MCT layers. The final CT (approximately 0.3 μm to 0.6 μm) capping layers were grown either by hot-wall epitaxy (HWE) or molecular-beam epitaxy (MBE). One of the wafers with the CT layer grown by MBE was also annealed in Hg atmosphere at 250°C for 96 h. The as-deposited CT passivation layers were polycrystalline and columnar. The CT grains were larger and more irregular when deposited by HWE, whereas those deposited by MBE were generally well textured with mostly vertical grain boundaries. Observations and measurements with several TEM abrupt structurally after annealing techniques showed that the CT/MCT interface became considerably more abrupt structurally after annealing, and the crystallinity of the CT layer was also improved.