GERO: a general SCA-based readout ASIC for micro-pattern gas detectors with configurable storage depth and on-chip digitizer

The paper presents GEneral Read Out(GERO), a general readout ASIC based on a switched capacitor array for micro-pattern gas detectors. It aims at providing general readout electronics for low-to-medium event-rate gas detectors with high sampling frequency, configurable storage depth, and data digitalization. The first prototype GERO chip integrates 16 channels and was fabricated using a 0.18-lm CMOS process. Each channel consists of a sampling array working in a ping-pong mode, a storage array with a 1024-cell depth, and 32 Wilkinson analog-todigital converters. The detailed design and test results are presented in the paper.     

带增益的气体探测器读出ASIC的研制

设计了用于带增益的气体探测器比如GEM、RPC等读出的ASIC,实现对探测器信号的放大、成形和对后续实时采样ADC的驱动电路.电荷增益和成形时间可调,有利于探测器不同增益下性能的研究,也扩展了芯片的应用范围.由于成形电路引入的噪声变得显著,在低电荷增益下,ENC会随增益下降而增加.芯片采用Chartered 0.35μm2P4M CMOS工艺,论文介绍了芯片的详细设计和仿真结果.     

基于峰值保持电路的GEM探测器前端读出ASIC设计

介绍了一种用于多层GEM探测器的低噪声前端读出ASIC芯片.针对GEM探测器输出信号特点,设计了电荷灵敏放大器、整形电路和峰值保持电路,并对其噪声、成形时间等设计指标参数进行了分析.     

用于GEM探测器的电容积分式读出芯片的研究

介绍了GEM探测器阵列结构的一种读出方案,重点介绍了该读出方案中开关阵列芯片的设计.主要内容包括PAD前端读出电子学结构,开关电容阵列结构工作原理,开关阵列芯片设计,文章的最后给出了芯片测试结果.该10通道开关电容阵列芯片可以扩展为更多的通道,以满足更大规模的GEM探测器的阵列方式读出需要.     

气体电子倍增膜(GEM)探测器的读出方式

作为一种新型微单元结构气体探测器，GEM探测器具有许多优势，其中之一就是其读出方式灵活多样。标准不同，读出方式的分类亦不相同。根据读出方式的不同原理，将GEM探测器的读出方式分为四种，分别介绍了这四种读出方式的基本原理，结构及工作过程，并对它们各自的优缺点作了比较。     

A 64-Channel Wide Dynamic Range Charge Measurement ASIC for Strip and Pixel Ionization Detectors

In this paper we report a 64-channel application specified integrated circuit (ASIC) for the readout of parallel plate strip and pixel ionization detectors. The detectors measure the intensity and the geometrical characteristics of a hadron beam for hadrontherapy cancer treatments. The ASIC is based on a current to frequency converter followed by a counter. It uses a charge balancing integration technique to obtain a dynamic range in excess of$10^5$with a nonlinearity of less than 1%. The ASIC has been designed in a CMOS 0.8$mu m$technology and it has been used for the readout of both strip ionization detectors for beam calibration and pixel detectors for beam monitoring during treatment. A new version of the chip in CMOS 0.35$mu m$technology which allows bipolar input currents has been designed and is currently under test.     

CMOS low-noise switched charge sensitive preamplifier for CdTe andCdZnTe X-ray detectors

CdTe and CdZnTe X-ray detector arrays for imaging and spectroscopy provide low capacitance current sources with low leakage currents. The optimal shaping time for low-noise operation is relatively high in CMOS analog channels that provide the readout for these detectors. The shaper is centered at lower frequencies, and thus the 1/f noise from the electronics is the main noise source that limits the resolution of the channel. The optimal dimensions of the input stage MOSFET are determined by this noise. In this paper a design criterion for the optimization of the resolution and the power consumption in a 1/f noise dominated readout is introduced. A readout based on CMOS switched charge sensitive preamplifier without feedback resistor has been designed and fabricated in the CMOS 2-μ low-noise analog process provided by MOSIS. This design provides high sensitivity and the possibility to integrate a large number of channels with low power consumption. Measurements of the performance of a first prototype chip are presented     

基于FELIX的微结构气体探测器读出电子学系统设计

微结构气体探测器因其精度高、面积大等优点，在粒子物理实验中得到了非常广泛的应用。微结构气体探测器的未来应用将面临ASIC种类多、通道数多、数据量大等问题，给读出电子学系统的设计带来了很大的挑战，已成为微结构气体探测器进一步发展应用的瓶颈。FELIX系统具有数据带宽大、通道数多等特点，可很好解决这一问题。基于FELIX的电子学系统由完成探测器信号数字化的前端电子学模块、完成数据汇总的GBT模块、完成数据读出的FELIX系统、完成数据处理的数据处理终端组成，可完成10 240路半数字通道读出或4 096路模拟通道读出。该系统与Micromegas探测器一起实现宇宙线径迹探测，验证了该系统的通用性和兼容性，为微结构气体探测器的应用需求提供了一个通用的解决方案。     

高计数率气体探测器读出电子学原型机研制

研制一套可用于高计数率气体探测器的读出电子学原型机系统,包括前端板、数据采集板和上位机。前端板采用一款先进的前端读出专用集成电路(ASIC)芯片实现对探测器信号的测量和模数转换;数据采集板利用现场可编程门阵列（FPGA）实现对数据的分析、处理和传输;上位机实现控制指令发送、PC端数据接收及存储等。在22~99 fC的输入范围内,原型机各通道积分非线性均好于024%;联合探测器使用55Fe放射源测试,结果好于相同条件下的商用电子学。可满足20 kHz计数率下GEM TPC探测器的读出需求。     

基于APV25多通道读出电子学系统设计

介绍了基于APV25芯片的多通道读出电子学系统的设计方法,利用ASIC芯片与可扩展读出系统相结合,实现多通道信号的处理。在该系统中,基于PXI机箱的单个读出板可实现2 048路信号的读出及处理,并具有集成度高、低功耗、可扩展等优点。电子学测试结果表明,本系统电荷输入线性动态范围为0~12 fC,APV25等效输入噪声408 e,可适应大型物理实验微结构气体探测器、硅像素探测器等探测器的读出需求。     

Performance of an ASD-8 based wire chamber readout system

For the medium-energy proton polarimeter mounted at the focal-plane of the Big-Bite Spectrometer at Kernfysisch Versneller Instituut Groningen, a new wire-chamber readout has been developed. The charge-sensitive preamplifier is based on the ASD-8 B chip which has an input impedance of 115 Ω. This low impedance and the short integration time of 6 ns at a usable sensitivity of 5 fC allow high readout rates and low gas amplifications. This front-end circuit is mounted on all four multi-wire proportional chambers and on two vertical-drift chambers with 3872 wires in total. Measurements have been made using sources and intermediate energy protons. Special attention was given to determine the time-over-threshold properties of the circuit. The time-over-threshold capabilities of the readout system extend future applications to particle discrimination, or, in connection with other detector types, to energy-resolving readout. The operational performance of the readout system is presented     

基于APV25读出电子学系统的GEM探测器的位置分辨与X射线成像研究

采用3层GEM膜制作了有效面积为10 cm×10 cm的GEM探测器,该探测器采用二维条读出方式,条间距为400 μm,每个维度有256个读出通道。探测器的读出采用APV25读出电子学系统,根据GEM探测器的需要,设计并改进了电子学系统使用的背板连接器。实验测得GEM探测器空间分辨为76 μm。进行了X射线二维成像研究,获得了清晰的二维图像,探测器与电子学运行稳定可靠。     

Low-Power Amplifier-Discriminators for High Time Resolution Detection

Low-power amplifier-discriminators based on a so-called NINO architecture have been developed with high time resolution for the readout of radiation detectors. Two different circuits were integrated in the NINO13 chip, processed in IBM 130 nm CMOS technology. The LCO version (Low Capacitance and consumption Optimization) was designed for potential use as front-end electronics in the Gigatracker of the NA62 experiment at CERN. It was developed as pixel readout for solid-state pixel detectors to permit minimum ionizing particle detection with less than 180 ps rms resolution per pixel on the output pulse, for power consumption below 300 muW per pixel. The HCO version (High Capacitance Optimization) was designed with 4 mW power consumption per channel to provide timing resolution below 20 ps rms on the output pulse, for charges above 10 fC. Results presented show the potential of the LCO and HCO circuits for the precise timing readout of solid-state detectors, vacuum tubes or gas detectors, for applications in high energy physics, bio-technologies or medical imaging.     

Design and simulation of charge sensitive preamplifier with CMOS FET implemented as feedback capacitor Cfp

In this paper,to design a new preamplifier for optimum performances with charged-particle or heavy-ion detectors,the CMOS FET is implemented as a feedback capacitor Cfp.so that the entire system should be built only with MOSFET.This work is a revolution design because to realize an ASIC for a preamplifier circuit,the capacitor will also be included.We succeed after a simulation to maintain a rise time less than 3 ns,the output resistance less than 94 Ω and the linearity almost good.     

基于3D Si PIN阵列热中子探测器的变增益宽动态前端读出电子学设计

基于Si CMOS技术的前端读出ASIC主要是根据3D Si PIN阵列热中子探测器的输出信号特性设计的。所设计的读出ASIC的主要电路模块包括电荷灵敏放大器（CSA）、模拟开关设计、具有三级电荷灵敏自动转换的自动增益控制模块（AGC）、相关双采样（CDS）和基准电流源电路。仿真结果表明,前端电路的输入动态范围为10 fC~80 pC。根据热中子探测器输出信号特性设计的ASIC的3个增益系数分别为19 V/pC、039 V/pC和94 mV/pC。所设计的ASIC的积分非线性小于 1%。单通道静态功耗约为 536 mW。零输入探测器电容时的等效噪声电荷为2416e-。计数率可达1 MHz 。     

XA readout chip characteristics and CdZnTe spectral measurements

The authors report on the performance of a CdZnTe (CZT) array readout by an XA (X-ray imaging chip produced at the AMS foundry) application specific readout chip (ASIC). The array was designed and fabricated at NASA/Goddard Space Flight Center (GSFC) as a prototype for the Burst Arc-Second Imaging and Spectroscopy gamma-ray instrument. The XA ASIC was obtained from Integrated Detector and Electronics (IDE), in Norway. Performance characteristics and spectral data for ²⁴¹Am are presented both at room temperature and at -20°C. The measured noise (σ) was 2.5 keV at 60 keV at room temperature. This paper represents a progress report on work with the XA ASIC and CZT detectors. Work is continuing and in particular, larger arrays are planned for future NASA missions     

硅像素探测器读出芯片的设计

针对应用在高能物理实验的硅像素探测器,设计了一种基于时间过阈技术的像素阵列读出芯片。芯片采用商用的130 nm CMOS工艺进行流片,共有30×10个像素单元,像素单元的面积为50 μm×250 μm。测试结果表明,像素单元电路的等效噪声电荷低于100e^-,积分非线性优于4.2%,基本实现了设计的功能。     

改进的CMOS电荷灵敏前放噪声优化设计方法

CMOS专用集成电荷灵敏前放的噪声性能对于辐射探测非常关键.提出了一种改进的CMOS电荷灵敏前放低噪声设计方法,通过实例计算得到的噪声结果比现有方法都有不同程度的提高.     

RG64—High Count Rate Low Noise Multichannel ASIC With Energy Window Selection and Continuous Readout Mode

We report on the performance of a low noise and high count rate readout ASIC with binary architecture and energy window selection for X-ray imaging applications using semiconductor detectors. The ASIC called RG64 is designed in 0.35 mum CMOS process and its total area is 3900times5000 mum². The core of RG64 consists of 64 readout channels. Each channel is built of a charge sensitive amplifier with a second order shaper of peaking time 75 ns, two independent discriminators with an 8-bit offset correction circuit and two independent 20-bit counters with RAM memory buffers. The ENC of the circuit reaches the value of about 126 el. rms with 1 pF input load and 5 mW power consumption per single channel. The mean gain in the multichannel ASIC is about 50 muV/el., with the dispersion from channel to channel of 0.9% (on one sigma level). The deviation of the effective threshold voltage spread for given energy can be reduced to less than 7 el. rms (calculated to the charge sensitive amplifier input). High count rate measurements have been performed up to 2 Mcps of average rate of input pulses, both for AC and DC coupled silicon strip detectors with X-ray photons of energy 8.04 keV. The RG64 can operate both in the continuous readout mode and in the readout mode separate from exposure.     

Characteristics of 16-Channel ASIC Preamplifier Board for Microstrip Gas Chamber and Animal PET

A 16-channel ASIC preamplifier board has been designed for microstrip gas chamber (MSGC) and animal position emission tomography (PET) detectors. The highly integrated ASIC chips can be used for individual readouts from a large number of channels to improve the spatial resolution and counting rate. The preamplifier board was tested to have a low optimum equivalent noise charge (ENC) of ~ 1400 e^? FWHM at a shaping time of 0.1 μs. The output voltage to input charge gain is 0.96 V/pC, and the nonlinearity is ~ 2:0% over a range of ?500 fC to 1000 fC in input charge. The rise time (10%–90%) with no input capacitor is about 54 ns. The power consumption of this preamplifier board is ~ 100 mW. The preamplifier board has been used to read out a 3 × 3 cm MSGC plate and an optimum FWHM energy resolution of 19.1% (5.9 keV peak of Fe-55) was obtained.