基于P-Type多晶硅TFT技术的集成型有源OLED驱动电路

低温多晶硅(LTPS:Low-temperature poly-Si)技术已经成为薄膜晶体管(TFT:thin film transistor)制作中最具吸引力的技术,并应用在AMOLED显示器中.P-type 技术能够简化 TFT 的制作过程.本文提出了一种应用 p-type 多晶硅 TFT的 AMOLED 驱动电路结构,包括栅极驱动器、数据驱动器以及像素阵列.数据驱动器采用分块方法,使得显示屏的输出线数大大减少.作者采用一种改进的 p-type 移位寄存器实现逐行选通的功能,并采用由 4 个 p-type 反相器级联构成的缓冲器来提高电路的驱动能力.为了验证上述电路结构的正确性,作者采用 HSPICE 软件进行仿真分析.结果表明,电路工作正常.利用韩国汉城国立大学及 Neo Poly 公司在多晶硅制作方面的优势,我们已经合作完成了应用上述电路结构的分辨率为96×3×128的有源 OLED 的制作.     

Novel TFT-Based emission driver in high performance AMOLED display applications

A novel integrated row driver for emission control with n-type thin-film transistors (TFTs) was proposed. A single stage of the proposed driving circuit consists of charge supplement unit, improved inverter, and power conservation unit besides input TFT and driving TFTs. Simulations were carried out with fabricated LTPS TFT. The results show the driving circuit achieves leakage prevention with no floating state and high reliability even under the V_th shift of 3 V. What's more, further measurement results show a 3 μs pulse width can be generated by the circuit, supporting 8k4k resolution with high refresh rate of 120 Hz. And the capability of low refresh rate (1 Hz) driving also can be achieved without degradation. In addition, only three control signals (two non-overlap clocks and one input signal) are used in the proposed circuit, where input signal of present stage is connected with the output of its previous stage. That means the row driver can work under independent control and be not susceptible, which contributes to generating adjustable pulse width for pulse width modulation (PWM) in active matrix organic light-emitting diode (AMOLED) displays.     

Poly-Si Thin-Film Transistors: An Efficient and Low-Cost Option for Digital Operation

In this paper, we propose an optimization methodology to design low-temperature polycrystalline-silicon thin-film transistors (LTPS TFTs) for submicrometer ultralow-power digital operation. LTPS TFTs incur low fabrication cost and can be fabricated on a variety of substrates (flexible such as polymer, glass, etc.). LTPS TFT has significantly reduced mobility, resulting in reduced driving current; however, we show that, for ultralow-power subthreshold operation (V_dd < V_th) , LTPS TFTs can be optimized to achieve comparable performance as a single-crystalline silicon (c-Si) silicon-on-insulator (SOI). For LTPS TFTs with T_S1 < 10 nm , ring oscillators (operating in subthreshold region) show significant reduction in intrinsic delay when the midgap trap density gets properly controlled (< 10¹² cm^-2) after hydrogenation with less dynamic energy consumption under isostatic power consumption compared to a c-Si SOI MOSFET. We also address the inherent variations in grain boundaries at device and circuit levels to gain practical insights.     

Poly-Si TFTs integrated gate driver circuit with charge-sharing structure

A p-type low-temperature poly-Si thin film transistors (LTPS TFTs) integrated gate driver using 2 non-overlapped clocks is proposed. This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects. It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period. The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases. The proposed gate driver shows a simple circuit, as only 6 TFTs and 1 capacitor are used for single-stage, and the buffer TFT is used for both pulling-down and pulling-up of output electrode. Feasibility of the proposed gate driver is proven through detailed analyses. Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than 0.8 pF, and pulse of gate driver outputs can be reduced to 5 μs. The proposed gate driver can still function properly with positive V_TH shift within 0.4 V and negative V_TH shift within-1.2 V and it is robust and promising for high-resolution display.     

AM-OLED的像素电路集锦（二）

用于AM-OLED的LTPS TFTs的阈值电压（Vth）和沟道迁移率（μ）在空间分布上是不够均匀的,用于AM-OLED的a-Si TFTs的Vth和μ会随时间偏移,这些缺点会造成显示屏亮度的不均匀性和不稳定性。为此,需要引入各种像素补偿电路,使显示屏发光亮度的均匀性和稳定性符合商品要求（文章分为两期刊登,本篇为第二部分）。     

AM-OLED的像素电路集锦(一)

用于AM-OLED的LTPS TFTs的阈值电压(Vth)和沟道迁移率(μ)在空间分布上是不够均匀的,用于AM-OLED的a-Si TFTs的Vth和μ会随时间偏移,这些缺点会造成显示屏亮度的不均匀性和不稳定性.为此,需要引入各种像素补偿电路,使显示屏发光亮度的均匀性和稳定性符合商品要求(文章分为两期刊登,本篇为第一部...     

Polysilicon thin-film transistors on polymer substrates

Different approaches to fabricate low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) on polymer substrates are reviewed and the two main routes are discussed: (1) standard fabrication of LTPS TFTs on glass substrates followed by a transfer process of the devices on the polymeric substrate; (2) direct fabrication of the devices on the polymeric substrate. Among the different techniques we have described in more detail the process we have recently developed for the fabrication of LTPS TFTs directly on ultra-thin polyimide (PI) substrate. LTPS TFT technology is particularly suited for high performance flexible electronics applications, due to the excellent device characteristics, good electrical stability and CMOS technology. Flexible display application remains the most attractive application for LTPS technology, especially for AMOLED displays, where device stability and the possibility to integrate the driving circuits make LTPS technology superior to all the other competitive TFT technologies. Among the other applications, particularly promising is also the application to flexible smart sensors, where integration of a front-end electronics is essential. Some examples of flexible gas sensors and pressure sensors, integrated with simple readout electronics based on LTPS TFTs and fabricated on ultra-thin PI substrate, are presented.     

A Novel Voltage-Feedback Pixel Circuit for AMOLED Displays

This study presents a novel voltage-modulated pixel circuit for active-matrix organic light-emitting diode (AMOLED) consisting of five n-type thin-film transistors (TFTs), one additional control signal, and one storage capacitor. The proposed circuit, which can be implemented in all-n-type and all-p-type low temperature poly-silicon (LTPS) TFT technologies, successfully compensates for threshold voltage deviation of TFTs and facilitates correction of OLED degradation using a voltage feedback method. Simulation and experimental results for all-n-type TFTs indicate that the proposed pixel circuit reduced the nonuniformity brightness problem effectively by compensating for threshold voltage variation in TFTs and reduced the degradation of emission efficiency in OLEDs.     

Dynamic Negative Bias Temperature Instability (NBTI) of Low-Temperature Polycrystalline Silicon (LTPS) Thin-Film Transistors

The dynamic negative bias temperature instability (NBTI) on low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) was investigated in detail. Experimental results revealed the threshold voltage shift of LTPS TFTs after the NBTI stress decreases with increasing frequency, which is different from the frequency-independence of conventional CMOSFET. Under a low frequency stress, the capacitance-voltage measurement with various frequencies implied that a larger quantity of inversion holes was trapped in the grain boundary. Thus, the difference of the transit time between the grain boundary and interface dominates the LTPS TFTs dynamic NBTI behaviors and results in the dependence of frequency.     

基于低温多晶硅薄膜晶体管的AMOLED交流像素电路

This work presents a new voltage programmed pixel circuit for an active-matrix organic light-emitting diode(AMOLED) display.The proposed pixel circuit consists of six low temperature polycrystalline silicon thinfilm transistors(LTPS TFTs),one storage capacitor,and one OLED,and is verified by simulation work using HSPICE software.Besides effectively compensating for the threshold voltage variation of the driving TFT and OLED,the proposed pixel circuit offers an AC driving mode for the OLED,which can suppress the degradation of the OLED.Moreover,a high contrast ratio can be achieved by the proposed pixel circuit since the OLED does not emit any light except for the emission period.     

New Gate-Bias Voltage-Generating Technique With Threshold-Voltage Compensation for On-Glass Analog Circuits in LTPS Process

A new proposed gate-bias voltage-generating technique with threshold-voltage compensation for analog circuits in the low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) is proposed. The new proposed gate-bias voltage-generating circuit with threshold-voltage compensation has been successfully verified in an 8-mum LTPS process. The experimental results have shown that the impact of TFT threshold-voltage variation on the biasing circuit can be reduced from 30% to 5% under a biasing voltage of 3 V. The new proposed gate-bias voltage-generating technique with threshold-voltage compensation enables the analog circuits to be integrated and implemented by the LTPS process on glass substrate for an active matrix LCD panel.     

Negative Bias Temperature Instability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors

The authors have proved that negative bias temperature instability (NBTI) is an important reliability issue in low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The measurements revealed that the threshold-voltage shift is highly correlated to the generation of grain-boundary trap states. Both these two physical quantities follow almost the same power law dependence on the stress time; that is, the same exponential dependence on the stress voltage and the reciprocal of the ambient temperature. In addition, the threshold-voltage shift is closely associated with the subthreshold-swing degradation, which originates from dangling bond formation. By expanding the model proposed for bulk-Si MOSFETs, a new model to explain the NBTI-degradation mechanism for LTPS TFTs is introduced     

A Novel Voltage Driving Method Using 3-TFT Pixel Circuit for AMOLED

A novel voltage driving method using three thin-film transistors (TFTs) for active-matrix organic light-emitting diodes (OLEDs) is presented and verified by automatic integrated circuit modeling SPICE simulation. The proposed novel 3-TFT pixel circuit, which successfully compensates for the threshold voltage variations, uses few TFTs with simplified control signals, and the current nonuniformity of the proposed circuit is 0.19% to 1.99% throughout the entire data range. To compensate for variations in OLED current, the proposed circuit utilizes a novel driving scheme that uses a diode connection current source with a biased voltage.     

低温多晶硅TFT技术的发展

本文综述低温多晶硅（LTPS）TFT技术的最新进展情况。该技术目前的研究前沿是：（1）制作高性能的TFT；（2）在柔性衬底上制作LTPS TFT；（3）驱动有机发光器件的TFT；（4）LTPS TFT的新应用。同时还展望了LTPS TFT技术的未来发展趋势。     

Digital driver for 2-inch LTPS AM-OLED displays

Organiclightemittingdiode(OLED)displayshave beenattractingmoreattentionbecauseoftheirvariousadvantagesincludingsimplestructure,self emitting,fast responsetimeandwideviewingangle.Inthelastdec ade,thefocusofresearchisonimprovementofefficiency andreliability…     

The effect of gate overlap lightly doped drains on low temperature poly-Si thin film transistors

Low temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) have a high carrier mobility that enables the design of small devices that offer large currents and fast switching speeds. However, the electrical characteristics of the conventional self-aligned polycrystalline silicon (poly-Si) TFTs are known to present several undesired effects, such as large leakage currents, the kink effect, and the hot-carrier effect. For this paper, LTPS TFTs were fabricated, and the SiN_x/SiO₂ gate dielectrics and the effect of the gate-overlap lightly doped drain (GOLDD) were analyzed in order to minimize these undesired effects. GOLDD lengths of 1, 1.5 and 2 μm were used, while the thickness of the gate dielectrics (SiN_x/SiO₂) was fixed at 65 nm (40 nm/25 nm). The electrical characteristics show that the kink effect is reduced in the LTPS TFTs using a more than 1.5 μm of GOLDD length. The TFTs with the GOLDD structure have more stable characteristics than the TFTs without the GOLDD structure under bias stress. The degradation from the hot-carrier effect was also decreased by increasing the GOLDD length. After applying the hot-carrier stress test, the threshold voltage variation (ΔV_TH) was decreased from 0.2 V to 0.06 V by the increase of the GOLDD length. The results indicate that the TFTs with the GOLDD structure were protected from the degradation of the device due to the decreased drain field. From these results it can be seen that the TFTs with the GOLDD structure can be applied to achieve high stability and high performance in driving circuit applications for flat-panel displays.     

Electrical characteristics of low temperature polysilicon TFT with a novel TEOS/oxynitride stack gate dielectric

This investigation is the first to demonstrate a novel tetraethylorthosilicate (TEOS)/oxynitride stack gate dielectric for low-temperature poly-Si (LTPS) thin film transistors (TFTs), composed of a plasma-enhanced chemical vapor deposition (PECVD) thick TEOS oxide/ultrathin oxynitride grown by PECVD N/sub 2/O-plasma. The stack oxide shows a very high electrical breakdown field of 8.4 MV/cm, which is approximately 3 MV/cm larger than traditional PECVD TEOS oxide. The field effective mobility of stack oxide LTPS TFTs is over 4 times than that of traditional TEOS oxide LTPS TFTs. These improvements are attributed to the high quality N/sub 2/O-plasma grown ultrathin oxynitride forming strong Si/spl equiv/N bonds, as well as to reduce the trap density in the oxynitride/poly-Si interface.     

Plasma Damage-Enhanced Negative Bias Temperature Instability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors

In this letter, a mechanism that will make negative bias temperature instability (NBTI) be accelerated by plasma damage in low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) is presented. The experimental results confirm that the mechanism, traditionally found in the thin gate-oxide devices, does exist also in LTPS TFTs. That is, when performing the NBTI measurement, the LTPS TFTs with a larger antenna ratio will have a higher degree in degradation of the threshold voltage, effective mobility, and drive current under NBTI stress. By extracting the related device parameters, it was demonstrated that the enhancement is mainly attributed to the plasma-damage-modulated creating of interfacial states, grain boundary trap states, and fixed oxide charges. It could be concluded that plasma damage will speed up the NBTI and should be avoided for the LTPS TFT circuitry design     

A new a-Si:H thin-film transistor pixel circuit for active-matrix organic light-emitting diodes

We propose a new pixel circuit using hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs), composed of three switching and one driving TFT, for active-matrix organic light-emitting diodes (AMOLEDs) with a voltage source method. The circuit simulation results based on the measured threshold voltage shift of a-Si:H TFTs by gate-bias stress indicate that this circuit compensates for the threshold voltage shifts over 10000 h of operation.     

Analysis of Negative Bias Temperature Instability in Body-Tied Low-Temperature Polycrystalline Silicon Thin-Film Transistors

Negative bias temperature instability (NBTI) degradation mechanism in body-tied low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) is analyzed by the charge-pumping (CP) technique. The properties of bulk trap states (including interface and grain boundary trap states) are directly characterized from the CP current. The increase of the fixed oxide charges is also extracted, which has not been quantified in previous studies of NBTI degradation in LTPS TFTs. The experimental results confirm that the NBTI degradation in LTPS TFTs is caused by the generation of bulk trap states and oxide trap states.