高效太阳电池硅衬底特性对原子层沉积Al2O3薄膜钝化性能的影响

Atom layer deposition （ALD）-Al2O3 thin films are considered effective passivation layers for p-type silicon surfaces. A lower surface recombination rate was obtained through optimizing the deposition parameters. The effects of some of the basic substrate characteristics including material type, bulk resistivity and surface morphology on the passivation performance of ALD-Al2O3 are evaluated in this paper. Surface recombination velocities of 7.8 cm/s and 6.5 cm/s were obtained for p-type and n-type wafers without emitters, respectively. Substrates with bulk resistivity ranging from 1.5 to 4 Ω · cm were all great for such passivation films, and a higher implied Voc of 660 mV on the 3 Ω · cm substrate was achieved. A minority carrier lifetime （MCL） of nearly 10 μs higher was obtained for cells with a polished back surface compared to those with a textured surface, which indicates the necessity of the polishing process for high-efficiency solar cells. For n-type semi-finished solar cells, a lower effective front surface recombination velocity of 31.8 cm/s was acquired, implying the great potential of （ALD）-Al2O3 thin films for high-efficiency n-type solar cells.     

Simulation analysis of the effects of a back surface field on a p-a-Si:H/n-c-Si/n+-a-Si:H heterojunction solar cell

In order to investigate the effects of a back surface field（BSF） on the performance of a p-doped amorphous silicon（p-a-Si：H）/n-doped crystalline silicon（n-c-Si） solar cell,a heterojunction solar cell with a p-a-Si：H/n-c-Si/n^＋-a-Si：H structure was designed.An n^＋-a-Si：H film was deposited on the back of an n-c-Si wafer as the BSF.The photovoltaic performance of p-a-Si：H/n-c-Si/n^＋-a-Si：H solar cells were simulated.It was shown that the BSF of the p-a-Si：H/n-c-Si/n^＋-a-Si：H solar cells could effectively inhibit the decrease of the cell performance caused by interface states.     

A 2.05 eV AIGaInP sub-cell used in next generation solar cells

An Al0.13GalnP sub-cell used as the top cell in the next generation of high efficiency multi-junction solar cells is fabricated. An efficiency of 10.04% with 1457.3 mV in Voc and 11.9 mA/cm2 in Isc was obtained. QE comparison was carried out to verify the influence of an O-related defect introduced by the high Al-content materials on the cell performance during MOCVD growth. Hetero-structures are employed to confirm the origin of the decreasing short circuit current density compared to a GalnP single junction solar cell. An effective method to improve the performance of broadband solar cells by increasing Isc with a cost of Voc was proposed.     

The impact of Al2O3 back interface layer on low-temperature growth of ultrathin Cu(In,Ga)Se2 solar cells

With reducing the absorber layer thickness and processing temperature, the recombination at the back interface is severe, which both can result in the decrease of open-circuit voltage and fill factor. In this paper, we prepare Al2O3 by atomic layer deposition (ALD), and investigate the effect of its thickness on the performance of Cu(In,Ga)Se2 (CIGS) solar cell. The device recombination activation energy (EA) is increased from 1.04 eV to 1.11 eV when the thickness of Al2O3 is varied from 0 nm to 1 nm, and the height of back barrier is decreased from 48.54 meV to 38.05 meV. An efficiency of 11.57 % is achieved with 0.88-μm-thick CIGS absorber layer.     

Influence of the layer parameters on the performance of the CdTe solar cells

Influence of the layer parameters on the performances of the CdTe solar cells is analyzed by SCAPS-1D. The ZnO:Al film shows a high efficiency than SnO2:F. Moreover, the thinner window layer and lower defect density of CdS films are the factor in the enhancement of the short-circuit current density. As well, to increase the open-circuit voltage, the responsible factors are low defect density of the absorbing layer CdTe and high metal work function. For the low cost of cell production, ultrathin film CdTe cells are used with a back surface field (BSF) between CdTe and back contact, such as PbTe. Further, the simulation results show that the conversion efficiency of 19.28% can be obtained for the cell with 1-μm-thick CdTe, 0.1-μm-thick PbTe and 30-nm-thick CdS.     

WXAMPS theoretical study of the bandgap structure of CZTS thin film to improve the device performance

The carrier recombination was one of the factors limiting the further improvement of the Cu2ZnSnS4 (CZTS) thin film solar cells. In this paper, a proper bandgap structure was designed to solve this problem. The effects of the different bandgap structure on the CZTS thin film solar cells were studied by the solar cell performance simulation software wxAMPS. A graded bandgap structure was designed and optimized. The bandgap with a front bandgap gradient and a flat bandgap gradient had a favorable effect on the CZTS thin film solar cells. Finally, the fill factor (FF) and conversion efficiency (η) of the CZTS thin film solar cell were increased from 36.41% to 42.73% and from 6.85% to 10.03%, respectively. In addition, the effect of donor and acceptor defect densities in CZTS absorber layer near the CdS/CZTS interface on the device performance was studied, η of the CZTS thin film solar cell was increased from 5.99% to 7.55% when the acceptor defect concentration was 1012—1013 cm-3. Moreover, the thicknesses of the CZTS absorber layer were optimized. The FF and η of the CZTS thin film solar cell were increased to 63.41% and 15.04%, respectively.     

Numerical modeling of ZnSnO/CZTS based solar cells

Numerical simulation has been performed to improve the performance of Cu2ZnSnS4 (CZTS) solar cells by replacing CdS with Zn1–xSnxO buffer layer. The influences of thickness, donor concentration and defect density of buffer layers on the performance of CZTS solar cells were investigated. It has been found that Zn1–xSnxO buffer layer for Sn content of 0.20 is better for CZTS solar cell. A higher efficiency can be achieved with thinner buffer layer. The optimized solar cell demonstrated a maximum power conversion efficiency of 13%.     

Antireflection properties and solar cell application of silicon nanoscructures

Silicon nanowire arrays（SiNWAs） are fabricated on polished pyramids of textured Si using an aqueous chemical etching method.The silicon nanowires themselves or hybrid structures of nanowires and pyramids both show strong anti-reflectance abilities in the wavelength region of 300-1000 nm,and reflectances of 2.52%and less than 8%are achieved,respectively.A 12.45%SiNWAs-textured solar cell（SC） with a short circuit current of 34.82 mA/cm² and open circuit voltage(K_oc) of 594 mV was fabricated on 125×125 mm² Si using a conventional process including metal grid printing.It is revealed that passivation is essential for hybrid structure textured SCs,and K_oc can be enlarged by 28.6%from 420 V to 560 mV after the passivation layer is deposited.The loss mechanism of SiNWA SC was investigated in detail by systematic comparison of the basic parameters and external quantum efficiency（EQE） of samples with different fabrication processes.It is proved that surface passivation and fabrication of a metal grid are critical for high efficiency SiNWA SC,and the performance of SiNWA SC could be improved when fabricated on a substrate with an initial PN junction.     

并五苯钝化层增强C60有机场效应晶体管性能的研究

We investigated the properties of C₆₀-based organic field-enect transistors（OFETs）（?） a pentacene passivation layer inserted between the C₆₀ active layer and the gate dielectric.After modification of the pentacene passivation layer,the performance of the devices was considerably improved compared to C₆₀-based OFETs with only a PMMA dielectric.The peak field-effect mobility was up to 1.01 cm²/（V·s） and the on/off ratio shifted to 10⁴.This result indicates that using a pentacene passivation layer is an effective way to improve the performance of N-type OFETs.     

铝背场对单晶硅太阳电池输出特性的影响

利用PCID软件模拟了n~+/p-p~+结构的单晶硅太阳电池铝背场与硅片厚度对其输出特性的影响.结果表明,有铝背场时太阳电池获得明显的开路电压、短路电流以及光电转换效率的增益;硅片厚度越小,铝背场对其输出特性的影响越大;在有铝背场情况下,硅片厚度为120μm时,可获得最大的光电转换效率.

Abstract：

The PC1D was usecl to simulate the influence of Al-BSF and wafer thickness on electrical properties of n~+/p-p~+ structural monocrystalline silicon solar cells. It is found that solar cells with the Al-BSF structure can gain obvious open circuit voltage, short-circuit current, as well as photoelectric conversion efficiency; the smaller the wafer thickness is, the bigger of the effect of Al BSF works on the electrical properties; when the wafer thickness is 120 m, the solar cells can get the biggest photoelectric conversion efficiency.     

Performance improvement of c-Si solar cell by a combination of SiNx/SiOx passivation and double P-diffusion gettering treatment

SiN_x/SiO_x passivation and double side P-diffusion gettering treatment have been used for the fabrication of c-Si solar cells. The solar cells fabricated have high open circuit voltage and short circuit current after the double P-diffusion treatment. In addition to better surface passivation effect, SiN_x/SiO_x layer has lower reflectivity in long wavelength range than conventional SiN_x film. As a consequence, such solar cells exhibit higher conversion efficiency and better internal quantum efficiency, compared with conventional c-Si solar cells.     

N型表面钝化晶体硅太阳电池Al2O3/SiNx减反射叠层的优化研究

减反射特性是进一步提高N型太阳电池能量转换效率的重要因素之一。研究采用Al2O3/SiNx叠层优化了N型太阳电池的减反射特性,并通过理论模拟和实验测量系统地探讨了叠层中SiNx厚度对表面反射性能的影响。研究证实在Al2O3层上增加一层SiNx,可以有效地优化表面减反射性质,从而提高N型太阳电池的光伏性质。     

Effects of surface passivation during atomic layer deposition of Al2O3 on In0.53Ga0.47As substrates

In this work we investigate the effect of different III-V surface passivation strategies during atomic layer deposition of Al₂O₃. X-ray photoelectron spectroscopy indicates that bare As-decapped and sulfur passivated In_0.53Ga_0.47As present residual oxides on the surface just before the beginning of the Al₂O₃ deposition while the insertion of a Ge interface passivation layer results in an almost oxide free Ge/III-V interface. The study of the initial growth regimes, by means of in situ spectroscopic ellipsometry, shows that the growth of Al₂O₃ on Ge leads to an enhanced initial growth accompanied by the formation of Ge-O-Al species thus affecting the final electrical properties of the stack. Alternatively, deposition on decapped and S-passivated In_0.53Ga_0.47As results in a more controlled growth process. The sulfur passivation leads to a better electrical response of the capacitor that can be associated to a lower oxide/semiconductor interface trap density.     

Approach for Al2O3 rear surface passivation of industrial p‐type Si PERC above 19%

Atomic layer deposition (ALD) of thin Al₂O₃ (≤10 nm) films is used to improve the rear surface passivation of large‐area screen‐printed p‐type Si passivated emitter and rear cells (PERC). A blister‐free stack of Al₂O₃/SiO_x/SiN_x is developed, leading to an improved back reflection and a rear recombination current (J_0,rear) of 92 ± 6 fA/cm². The Al₂O₃/SiO_x/SiN_x stack is blister‐free if a 700°C anneal in N₂ is performed after the Al₂O₃ deposition and prior to the SiO_x/SiN_x capping. A clear relationship between blistering density and lower open‐circuit voltage (V_OC) due to increased rear contacting area is shown. In case of the blister‐free Al₂O₃/SiO_x/SiN_x rear surface passivation stack, an average cell efficiency of 19.0% is reached and independently confirmed by FhG‐ISE CalLab. Compared with SiO_x/SiN_x‐passivated PERC, there is an obvious gain in V_OC and short‐circuit current (J_SC) of 5 mV and 0.2 mA/cm², respectively, thanks to improved rear surface passivation and rear internal reflection. Copyright © 2012 John Wiley & Sons, Ltd.     

20.7% efficient ion‐implanted large area n‐type front junction silicon solar cells with rear point contacts formed by laser opening and physical vapor deposition

In this work, we report on ion‐implanted, high‐efficiency n‐type silicon solar cells fabricated on large area pseudosquare Czochralski wafers. The sputtering of aluminum (Al) via physical vapor deposition (PVD) in combination with a laser‐patterned dielectric stack was used on the rear side to produce front junction cells with an implanted boron emitter and a phosphorus back surface field. Front and back surface passivation was achieved by thin thermally grown oxide during the implant anneal. Both front and back oxides were capped with SiN_x, followed by screen‐printed metal grid formation on the front side. An ultraviolet laser was used to selectively ablate the SiO₂/SiN_x passivation stack on the back to form the pattern for metal–Si contact. The laser pulse energy had to be optimized to fully open the SiO₂/SiN_x passivation layers, without inducing appreciable damage or defects on the surface of the n⁺ back surface field layer. It was also found that a low temperature annealing for less than 3 min after PVD Al provided an excellent charge collecting contact on the back. In order to obtain high fill factor of ~80%, an in situ plasma etching in an inert ambient prior to PVD was found to be essential for etching the native oxide formed in the rear vias during the front contact firing. Finally, through optimization of the size and pitch of the rear point contacts, an efficiency of 20.7% was achieved for the large area n‐type passivated emitter, rear totally diffused cell. Copyright © 2014 John Wiley & Sons, Ltd.     

Thin Al2O3 passivated boron emitter of n‐type bifacial c‐Si solar cells with industrial process

We have presented thin Al₂O₃ (~4 nm) with SiN_x:H capped (~75 nm) films to effectively passivate the boron‐doped p⁺ emitter surfaces of the n‐type bifacial c‐Si solar cells with BBr₃ diffusion emitter and phosphorus ion‐implanted back surface field. The thin Al₂O₃ capped with SiN_x:H structure not only possesses the excellent field effect and chemical passivation, but also establishes a simple cell structure fully compatible with the existing production lines and processes for the low‐cost n‐type bifacial c‐Si solar cell industrialization. We have successfully achieved the large area (238.95 cm²) high efficiency of 20.89% (front) and 18.45% (rear) n‐type bifacial c‐Si solar cells by optimizing the peak sintering temperature and fine finger double printing technology. We have further shown that the conversion efficiency of the n‐type bifacial c‐Si solar cells can be improved to be over 21.3% by taking a reasonable high emitter sheet resistance. Copyright © 2017 John Wiley & Sons, Ltd.     

Front and rear silicon‐nitride‐passivated multicrystalline silicon solar cells with an efficiency of 18.1%

A solar cell process designed to utilise low‐temperature plasma‐enhanced chemical vapour deposited (PECVD) silicon nitride (SiN_x) films as front and rear surface passivation was applied to fabricate multicrystalline silicon (mc‐Si) solar cells. Despite the simple photolithography‐free processing sequence, an independently confirmed efficiency of 18.1% (cell area 2 × 2 cm²) was achieved. This excellent efficiency can be predominantly attributed to the superior quality of the rear surface passivation scheme consisting of an SiN_x film in combination with a local aluminium back‐surface field (LBSF). Thus, it is demonstrated that low‐temperature PECVD SiN_x films are well suited to achieve excellent rear surface passivation on mc‐Si. Copyright © 2002 John Wiley & Sons, Ltd.     

20.0% Efficiency Si Nano/Microstructures Based Solar Cells with Excellent Broadband Spectral Response

Spectral response of solar cells determines the output performance of the devices. In this work, a 20.0% efficient silicon (Si) nano/microstructures (N/M‐Strus) based solar cell with a standard solar wafer size of 156 × 156 mm² (pseudo‐square) has been successfully fabricated, by employing the simultaneous stack SiO₂/SiN_x passivation for the front N/M‐Strus based n⁺‐emitter and the rear surface. The key to success lies in the excellent broadband spectral responses combining the improved short‐wavelength response of the stack SiO₂/SiN_x passivated Si N/M‐Strus based n⁺‐emitter with the extraordinary long‐wavelength response of the stack SiO₂/SiN_x passivated rear reflector. Benefiting from the broadband spectral response, the highest open‐circuit voltage (V_oc) and short‐circuit current density (J_sc) reach up to 0.653 V and 39.0 mA cm^?2, respectively. This high‐performance screen‐printed Si N/M‐Strus based solar cell has shown a very promising way to the commercial mass production of the Si based high‐efficient solar cells.     

Experimental evidence of parasitic shunting in silicon nitride rear surface passivated solar cells

Many solar cells incorporating SiN_x films as a rear surface passivation scheme have not reached the same high level of cell performance as solar cells incorporating high‐temperature‐grown silicon dioxide films as a rear surface passivation. In this paper, it is shown by direct comparison of solar cells incorporating the two rear surface passivation schemes, that the performance loss is mainly due to a lower short‐circuit current while the open‐circuit voltage is equally high. With a solar cell test structure that features a separation of the rear metal contacts from the passivating SiN_x films, the loss in short‐circuit current can be reduced drastically. Besides a lower short‐ circuit current, dark I–V curves of SiN_x rear surface passivated solar cells exhibit distinct shoulders. The results are explained by parasitic shunting of the induced floating junction (FJ) underneath the SiN_x films with the rear metal contacts. The floating junction is caused by the high density of fixed positive charges in the SiN_x films. Other two‐dimensional effects arising from the injection level dependent SRV of the Si/SiN_x interfaces are discussed as well, but, are found to be of minor importance. Pinholes in the SiN_x films and optical effects due to a different internal rear surface reflectance can be excluded as a major cause for the performance loss of the SiN_x rear surface passivated cells. Copyright © 2002 John Wiley & Sons, Ltd.     

Incorporation of dielectric layers into the processing of III-nitride-based heterostructure field-effect transistors

Dielectric layers within III-nitride transistor technology can act either as passivation layers or as gate-dielectric layers. In this paper, we reflect on both issues and present novel approaches of dielectric schemes. In both cases, the elimination of surface traps or, more generally, of surface states is a key issue in obtaining improved device performance. As gate dielectrics, we introduced and investigated thermally and photoelectrochemically generated Al_xGa_2−xO₃, SiO₂, the combination of Al_xGa_2−xO₃ and SiO₂ (tandem-dielectric stack), and e-beam-deposited Al₂O₃. These dielectric layers serve simultaneously as a passivation layer. In addition, we introduced plasma-enhanced chemical-vapor deposition (PECVD)-deposited SiN_x for passivation. The results highlight the importance of passivation and the introduction of gate dielectrics and emphasize the relationship between surface states and improved direct-current (DC) performance. Backed by additional measurements, we proposed a different gateleakage mechanism for heterostructure field-effect transistor (HFET) and metal-oxide semiconductor heterostructure field-effect transistor (MOSHFET) devices.