New V-groove double-diffused m.o.s. (v.d.m.o.s.)

A new V-groove double-diffused m.o.s. (v.d.m.o s.) is proposed which combines the V-groove technology and the double-diffused m.o.s. (d.m.o.s.) technology. The fabrication processes arc qualitatively described. The gate is located on the vertical V-shaped surface, and the effective channel length is controlled by the vertical-diffusion process of the double-diffusion step. The v.d.m.o.s. is expected to have a faster speed and higher production yield than the ordinary d.m.o.s.     

Implementation of 3-valued logic with c.o.s.m.o.s. integrated circuits

Two ternary gates realising basic ternary operators (ternary NOR, NAND and invertors) are designed with c.o.s.m.o.s. integrated circuits. Any one of these gates may be used to implement several 3-valued algebras.     

Polarisable dielectrics for m.o.s.t.s

The use of a new and polarisable dielectric layer has made it possible to obtain large threshold-voltage shifts in m.o.s. capacitors.     

Transient response of m.o.s. transistors

The charge equation of enhancement-type m.o.s. transistors is derived. The waveforms and practical expressions of the switching times of the resistor-coupled m.o.s. switching circuit are determined.     

Silicon-on-sapphire m.o.s.f.e.t.s fabricated by back-surface laser-anneal technology

Self-aligned aluminium-gate silicon-on sapphire (s.o.s.) m.o.s.f.e.t.s have been fabricated by applying laser-anneal technology from the back surface for activation of the ion-implanted channel layer. The threshold voltage and surface electron mobility were similar to the conventional silicon-gate m.o.s.f.e.t.s, but the low resistivity of gate and interconnection electrodes using aluminium is advantageous for high switching speed m.o.s. l.s.i.     

Semi-ideal sine oscillators (s.i.s.o.)

A class of semi-ideal sine oscillators (s.i.s.o.) featuring independent control of frequency and damping and lack of spurious responses is described.     

Complementary dynamic m.o.s. logic circuits

Allowing both p and n channel groups of transistors to be blocked between transitions of c.m.o.s. gates leads to complementary dynamic m.o.s. circuits which, in many cases, are significantly less complex than their static counterparts. The value of the concept and a method of synthesis are demonstrated with a practical example. Systematic application to frequency dividers yields very simple new structures.     

Quartz oscillator in complementary m.o.s. technology

A short mathematical method is developed to obtain the drain?source current expression at low voltage of an m.o.s. transistor, and therefore the gain of a complementary m.o.s. invertor. Input/output transfer characteristics are compared with computed theoretical results. A variant of the c.m.o.s. invertor, the passive-charge invertor, gives the best results for supply voltage. Another variant, the mixed-charge invertor, is the most advantageous from the point of view of frequency change with temperature and supply voltage.     

Subthreshold behaviour of e.s.f.i.-s.o.s. transistors

Theoretical and experimental results are presented which illustrate the influence of various parameters on the subthreshold behaviour of e.s.f.i.-s.o.s. transistors. The numerical analysis accounts for the thin silicon film and the existence of a second interface. A comparison is made with a corresponding bulk transistor, furthermore, between a two- and a one-dimensional analysis of e.s.f.i.-s.o.s. m.o.s.t. The agreement for real cases is found to be excellent.     

Temperature effects in m.o.s. transistors

The effects of temperature on m.o.s. transistors, operated in the pinchoff mode under constant-current conditions, are examined. A theoretical derivation, which accounts for interface and substrate conditions, is presented for the temperature coefficient of the gate-source voltage. Experimental measurements on both n- and pchannel silicon m.o.s. transistors are compared with theory.     

Leak-compensated analog memory with pair m.o.s.f.e.t.s

A fast, simple, and relatively stable analog memory element is proposed, composed of two condensers and a pair of complementary m.o.s.f.e.t.s. The memory element was made sufficiently stable by the use of complementary m.o.s.f.e.t.s to enable a learning machine to complete the learning process within a comparatively short time.     

On-resistance of V-v.m.o.s. power transistors

An expression for the on-resistance of a V-groove vertical-channel m.o.s. (V-v.m.o.s.) transistor is presented. The expression relates the on-resistance to the geometry and resistivity of the drain drift region and is useful in optimising the drift region parameters for minimum on-resistance and maximum drain-source breakdown.     

Depletion m.o.s. power transistors

A new depletion m.o.s. transistor is proposed. The structure uses anisotropic etching to define the channel in an n?p epitaxial silicon slice. The fabrication, characteristics and power capabilities of the device are discussed.     

Technique for increasing the gain-bandwidth product of n-m.o.s. and p-m.o.s. integrated inverters

A method for increasing the bandwidth of single-channel m.o.s. integrated inverters, with practically no decrease in low-frequency gain, is presented. A 1st-order analysis and computer simulation are included.     

White-light emission from GaAs m.o.s. structures

Emission of light from GaAs m.o.s. structures with anodic native oxides is reported. The spectrum is continuous, covers the visible range and has substantial parts that have higher photon energies than the GaAs energy gap. A part of the emission therefore seems to originate from the amorphous native GaAs oxide with its wide energy gap of about 4.5 eV. The light appears white to the eye and its intensity, but not its spectral distribution, can be controlled by the bias applied to the m.o.s. structure.     

Modelling of short-channel m.o.s. transistors

The effects of both the bulk charge due to the drain depletion region and the saturation of carrier velocity on the current/voltage characteristics of short-channel m.o.s.t.s are considered. Theoretical calculations based on both 2-dimensional and 1-dimensional models show close agreement with experimental measurements.     

Test of the thermal-noise hypothesis in m.o.s.f.e.t.s

Evidence is given that, for m.o.s.f.e.t.s, another source o noise besides thermal noise must be operating in the conducting channel.     

Silicon-on-insulator m.o.s.f.e.t.s fabricated on laser-annealed polysilicon on SiO2

N-channel-enhancement and light-depletion-mode m.o.s.f.e.t.s have been fabricated on laser-annealed 0.5 ?m polysilicon films, deposited on 1 ?m of SiO2 grown on single-crystal silicon substrates. Threshold voltages of 0.35?0.45 V and ?0.5 ? ?0.7 V and surface mobilities of 170 cm2/Vs and 215 cm2/Vs were obtained on the enhancement and depletion devices, respectively. These results compare favourably with values realised in silicon-on-sapphire (s.o.s.) and bulk N-m.o.s. devices. In addition, the measured source-drain leakage currents match the best reported values for s.o.s. devices.     

Design for a high-speed m.o.s. associative memory

An experimental 64-bit m.o.s. associative memory has been developed from a limit-case design study. Speeds in excess of 50 MHz are reported at a cost per bit that could approach eight times that for a conventional m.o.s. dynamic r.a.m. The design of the basic associative memory cell is described.     

Three-valued c.m.o.s. cycling gates

The design of three-valued cycling gates with c.m.o.s. integrated circuits is presented. Circuits for the cycling and the inverse cycling gates prove to be simpler than those previously reported.