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1.
In this paper, we propose two new types of dual-pole double-throw (DPDT) switch GaAs JFET monolithic microwave integrated circuits (MMICs) for digital cellular handsets. These ICs have the excellent characteristics of low insertion loss and high power handling capability, even with a low control voltage by stacking three JFETs with shallow Vp and using a novel bias circuit using p-n junction diodes. One DPDT switch IC has two shunt FET blocks and can achieve high isolation without external parts. An insertion loss less than 0.6 dB and isolation over 25 dB up to 2 GHz were achieved. P1dB was about 35 dBm even with a control voltage of 0/3 V. Another DPDT switch IC utilizes parallel resonance of external inductors and parasitic capacitance between the drain and the source of the OFF-state FETs. By attaching 15 nH inductors, for example, the IC exhibited an insertion loss as low as 0.4 dB, an isolation of better than 40 dB at 1.5 GHz, a bandwidth of about 400 MHz for 20 dB isolation, and P1dB of about 34 dBm with the 0/3 V control  相似文献   

2.
The integration of microelectromechanical systems (MEMS) switch and control integrated circuit (IC) in a single package was developed for use in next-generation portable wireless systems. This packaged radio-frequency (RF) MEMS switch exhibits an insertion loss under -0.4 dB, and isolation greater than -45 dB. This MEMS switch technology has significantly better RF characteristics than conventional PIN diodes or field effect transistor (FET) switches and consumes less power. The RF MEMS switch chip has been integrated with a high voltage charge pump plus control logic chips into a single package to accommodate the low voltage requirements in portable wireless applications. This paper discusses the package assembly process and critical parameters for integration of MEMS devices and bi-complementary metal oxide semiconductor (CMOS) control integrated circuit (IC) into a single package.  相似文献   

3.
A 1 GHz variable modulus freqency divider with very low dissipation current has been developed. Using a high-transconductance (200?250 mS/mm) FET by Pt burying technology and series gating source-coupled FET logic, the dissipation current of the fabricated IC was reduced to 3.2 mA at 1 GHz operation.  相似文献   

4.
A compact ultra-broadband distributed SPDT switch has been developed using GaAs PHEMTs. An FET-integrated transmission line structure, where the source pad of the shunt FET has been integrated into the signal line while the drain has been grounded to a via-hole with minimum parasitic inductance, has been proposed to extend the operating bandwidth of the distributed switches. SPDT and SPST switches using this structure have been fabricated using a commercial GaAs PHEMT foundry. The SPDT switch showed low insertion loss (<2 dB) and good isolation (>30 dB) over an octave bandwidth from 40 to 85 GHz. At 77 GHz, the SPDT switch showed extremely low insertion loss of 1.4 dB and high isolation of 38 dB. The chip size was as small as 1.45/spl times/1.0 mm/sup 2/. To the best of our knowledge, this is among the best performance ever reported for an octave-band SPDT switch at this frequency range. SPST switch also showed the excellent performance with the insertion loss of 0.4 dB and isolation of 34 dB at 60 GHz.  相似文献   

5.
A +5-V single-power-supply 10-b video BiCMOS sample-and-hold IC is described. Video speed, low power, and 10-b accuracy sample-and-hold operation have been achieved using a complementary connected buffer format sample switch. A high-speed p-n-p transistor used in the sample switch is formed by a combination of n-p-n and PMOS transistors. The sample-and-hold operation is accomplished by feeding back the hold capacitor voltage to the sample switch inputs, so that the inputs transfer symmetrically for the hold capacitor voltage at any input level. The sample-and-hold IC has been implemented in 1.2-μm BiCMOS technology and evaluated. The following results have been obtained: 185-MHz 3-dB bandwidth at 22-pF hold capacitor, 63-dB signal-to-noise ratio at 8-MHz full-scale input, 20-ns acquisition time at 1-V step input, 15-ns switch setting time, and 0.1% linearity error. Power dissipation is 150 mW  相似文献   

6.
Since the GaAs FET switch can be regarded as a linear small-signal device in the on and off states, a linear analysis is carried out only of the two states, but taking into account the geometry of electrodes, passivation layers, and depletion regions. The rectangular boundary division method is applied to solve Laplace's equation for the impedance characterization of GaAs FET switches. Equivalent electrical circuits composed of capacitors and resistors are defined for the on state and off state of a FET switch. The capacitances and resistances in the equivalent circuits are estimated and compared with experimentally measured values at 10 GHz. The quality factor of the FET switch, which can be used for estimating insertion loss, is calculated by using the two equivalent series impedances of the FET switch corresponding to the two states  相似文献   

7.
高性能PWM型DC-DC升压变换器研究   总被引:2,自引:2,他引:0  
设计了一种单片集成PWM型电流模式升压变换器,芯片内部集成了耐压22V的DMOS功率开关管,开关频率为1.6MHz,采用1.5μmBCD工艺实现。芯片具有很宽的输入电压(2.7~14V)、高效率(85%)、低关断电流、快速暂态响应和低功耗等特性,适宜于用作便携式设备的电源管理,也可作为IP核,嵌入同种工艺下的其它芯片。文中除了对芯片设计方法、思路及主要电路模块结构的设计方案进行讨论外,还提出了减小单片集成开关电源噪声的措施。  相似文献   

8.
This paper presents a wideband cold-FET switch with virtually zero power dissipation. The use of InP HEMTs with a low R/sub on//spl middot/C/sub off/ product enables us to configure a DC-to-over-10-GHz single-pole double-throw (SPDT) switch without using a shunt FET. The series-FET configuration offers a logic-level-independent interface and makes possible positive control voltage operation in spite of using depletion-mode FETs. A miniaturized 2/spl times/2 switch using two SPDT switches yields an insertion loss of less than 1.16 dB and isolation of more than 21.2 dB below 10 GHz, which allows us to increase the scale of the switch in a single chip easily. The add-drop operation combining two 2/spl times/2 switches in a single chip and a 4/spl times/4 switch IC integrating four 2/spl times/2 switches are presented. The packaged ICs achieve error-free operation up to 12.5 Gb/s with either positive or negative logic-level input. Extremely fast switching of /spl sim/140 ps is also successfully demonstrated.  相似文献   

9.
A 1.9-GHz single-chip GaAs RF transceiver has been successfully developed using a planar self-aligned gate FET suitable for low-cost and high-volume production. This IC includes a negative voltage generator for 3-V single voltage operation and a control logic circuit to control transmit and receive functions, together with RF front-end analog circuits-a power amplifier, an SPDT switch, two attenuators for transmit and receive modes, and a low-noise amplifier. The IC can deliver 22-dBm output power at 30% efficiency with 3-V single power supply, The new negative voltage generator operates with charge time of less than 200 ns, producing a low level of spurious outputs below -70 dBc through the power amplifier. The generator also suppresses gate-bias voltage deviations to within 0.05 V even when gate current of -144 μA flows. The IC incorporates a new interface circuit between the logic circuit and the switch which enables it to handle power outputs over 24 dBm with only an operating voltage of 3 V. This transceiver will be expected to enable size reductions in telephones for 1.9-GHz digital mobile communication systems  相似文献   

10.
A high power GaAs monolithic RF switch IC that can handle powers over 5 W (P1 dB: 37 dBm) with a positive 5-V control voltage was developed. This high power handling capability was achieved by using a novel circuit configuration that makes possible the feeding forward of the input-signal to the control gates. The implemented Single Pole Dual Throw switch IC integrated with the coupling capacitors using a high dielectric material, Barium Strontium Titanate, shows an insertion loss less than 0.8 dB at 1 GHz and an isolation over 25 dB in a frequency range of 0.5-1.5 GHz  相似文献   

11.
This paper presents the broadest band monolithic-microwave integrated-circuit traveling-wave switch ever reported for millimeter-wave applications. The developed switch with the novel structure of a 400-μm-gate finger field-effect transistor (FET) indicated an insertion loss of less than 2.55 dB and an isolation of better than 22.2 dB from dc to 110 GHz. Also, the switch indicated no degradation of insertion loss and an ON/OFF ratio of more than 22.7 dB up to an input power of 26.5 dBm at 40 GHz. Circuit analytical results based on a lossy transmission-line model for small-signal performance and circuit simulation results using the two-terminal nonlinear FET model for large-signal operation successfully showed good agreement with the experimental results  相似文献   

12.
Fairchild Power Switch将PWM IC与SenseFET组合在同一封装内,是一种新型功能开关调节器。文章介绍了FPS的特点,及其在锂离子充电器中的应用。  相似文献   

13.
A 16×16 crosspoint switch IC has been designed and implemented in a 2-μm GaAs heterojunction bipolar transistor (HBT) technology. The IC is a strictly nonblocking switch with broadcast capability and asynchronous data paths. The IC has fully differential internal circuitry and is packaged in a custom high-speed assembly. Test results confirmed that the IC achieves a 10-Gb/s/channel (or 160-Gb/s aggregate) capacity, the highest reported to date for a 16×16 crosspoint switch IC  相似文献   

14.
GaAs MESFET switch IC's operating at low control voltages of 0/-3 V and +3/0 V have been developed for use in Personal Handy Phones using the 1.9 GHz band. The switch IC's have excellent RF characteristics, and have no need for external circuit installation. The unique points of these IC's are the use of GaAs MESFET's with two kinds of pinch-off voltages and a symmetrical source and drain pattern configuration with respect to the gate. The 0/-3 V IC had low insertion loss of 0.55 dB and 0.65 dB, and high isolation of 31 dB and 24 dB at receiving and transmitting operations, respectively. The +3/0 V IC also had excellent characteristics such as insertion loss of 0.73 dB and 0.95 dB, and isolation of 27 dB and 23 dB, respectively. Both IC's had an output power at 1 dB gain compression point of 25.4 dBm and 3rd order intercept point of more than 46 dBm  相似文献   

15.
射频微机械CPW开关的研究   总被引:2,自引:0,他引:2       下载免费PDF全文
本文采用聚酰亚胺牺牲层技术和二氧化硅介质隔离技术,成功地在绝缘多晶硅衬底上研制出一种射频微机械CPW开关.初步测试结果如下:开态电容为0.21pF,关态电容为6.1pF,致动电压为22V,关态下的隔离度为35dB,开态下插入损耗为3dB.该工艺完全与硅基IC工艺兼容,这为射频微机械CPW开关与IC实现单片集成化,降低体积提高可靠性打下了基础.  相似文献   

16.
RF MEMS开关的发展现状   总被引:1,自引:1,他引:0  
RF MEMS开关是其各种组件、系统级应用中最基本的器件之一,具有低损耗、低功耗、线性化好、尺寸小及易集成等特点。对各种开关驱动机制的特点进行了比较,指出具体驱动机制的选取应符合实际应用的需求;在和传统pin开关、FET开关相比较的基础上,总结了RF MEMS开关的优缺点,概述了其目前的应用领域以及面临的主要问题;最后介绍了目前国内外RFMEMS开关研究状况。通过对国内外一些经典RF MEMS开关范例的简述,展望了RFMEMS开关未来的发展趋势。  相似文献   

17.
We propose a new type of dual-pole triple-throw double heterojunction monolithic microwave integrated circuit (IC) switch for use in digital cellular phones. The IC we developed exhibits a low gate leakage current of 400 nA and an insertion loss as low as 0.4 dB, even at added power of 34 dBm at a frequency of 950 MHz. Measured P1 dB was about 36 dBm, and a low distortion of 65 dBc was also obtained  相似文献   

18.
The circuitry for a 12-b 1-Gword/s digital-to-analog converter (DAC) IC is described. A DC linearity of /spl plusmn/1/8 LSB has been preserved with this all-depletion GaAs MESFET chip. Dynamic measurements in the frequency domain indicate nonlinearities of less than -62 dBc at a 1-GHz clock rate. The DAC uses a very fast FET analog current switch that exhibits sufficiently low leakage currents for a 12-b linearity. The limited on-chip matching capabilities require the precision DC currents to be generated external to the GaAs chip. A current-switching DAC that partitions the high-speed functions onto a single GaAs chip while the high-precision bit currents are realized off-chip is described. The GaAs chip contains 12 1-b cells, each of which switches an analog bit current into a single sampler circuit that is shared by all the switches. The sampler is used to increase the dynamic linearity in the DAC.  相似文献   

19.
A low-power embedded SRAM for a large range of applications has been implemented in a standard digital 0.18-/spl mu/m process. The leakage current in the cells is reduced by using a source-body bias not exceeding the value that guaranties safe data retention, and less leaking nonminimum length transistors. Locally short-circuiting this bias, speed and noise margin loss in active mode is avoided, especially for low supply voltages. The bias is generated internally at the carefully designed equilibrium between cell, switch, and diode limiter leakages averaged over the array. The leakage of the full SRAM, including an optimized periphery, is reduced more than 20 times. Used in an industrial RF transceiver, the measurements confirm its performances.  相似文献   

20.
The device parameter dependences of GaAs FET switch performance have been determined analytically and by two-dimension simulation. FET switch design would maximize the value of the switch quality factor while retaining the power handling capacity. Expressions for both the quality factor and power handling capacity are derived in terms of device parameters, and would enable such optimization to be performed.  相似文献   

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