Series equivalent circuit representation of SiO2Si interface and oxide trap states

The small-signal frequency response of silicon dioxide-silicon interface and oxide trap states has been investigated and interpreted using a series R-C equivalent circuit model instead of the commonly used parallel R-C equivalent circuit model. It is shown that the series equivalent circuit model is advantageous in extracting the time constants of the oxide traps located in the silicon dioxide layer from experimental data and allows a determination of the spatial extension of the oxide traps. Comparisons of a two-step model, consisting of the Shockley-Read-Hall transition between the band and the interface states and the elastic tunneling transition between the interface and oxide trap states, with experimental data are given to illustrate the range of experimental data required to evaluate an unique set of tunneling and SRH parameters.     

Determination of the interface properties of Ni-silicided strained-Si/SiGe heterostructure Schottky diodes using capacitance–voltage technique

Capacitance–voltage (C–V) profiling has been used to study the interface properties and apparent doping profile of NiSi/strained-Si heterostructure Schottky diodes. The interface states have been characterized using the capacitance–voltage (C–V) and capacitance–frequency (C–f) techniques for diodes annealed at 400 and 600 °C. Based on the depletion approximation and interfacial layer with interface states, an equivalent circuit model has been developed to explain the anomalous C–V characteristics observed in case of silicided-Schottky diodes. Self-consistent analytical expressions, developed from the proposed equivalent circuit, have been used to simulate the experimental C–V characteristics using both the MATHCAD and SEMICAD device simulation tool. An excellent agreement has been obtained between the experimental and simulated C–V characteristics, which strongly support the validity of the proposed model.     

Determination of energy density distribution and capture cross-section of interface states in the metal-nitride-oxide-semiconductor (MNOS) structure

The capacitance and conductance of a metal-nitride-oxide-semiconductor (MNOS) capacitor was measured as a function of voltage at various frequencies between 10 Hz and 200 kHz using a “lock-in” amplifier. The capacitance as a function of voltage was also measured at a frequency of 1 MHz as well as under quasi-static conditions. All the measurements were made at a temperature of 298°K. The high-frequency C-V measurements were used to establish the relation between the surface potential and gate voltage. The experimental data was analysed in terms of the theoretical models of Lehovec and of Deuling et al. to determine the energy density distribution of the interface states. The interface states density calculated from the quasi-static capacitance measurements agreed with those obtained from the low frequency capacitance results analysed in terms of Lehovec's model. However, in the energy range between 0.5 and 0.9 eV, the vlaues of the interface states energy density calculated from fitting the conductance data to the model of Deuling et al. differ from those obtained by the other two methods by as much as a factor of two due to the high density of interface states in the MNOS device. The analysis of conductance data also furnished the values of electron capture cross-section which decreases approximately exponentially with interface states energy, varying from 10^?13 cm² at 0.4 eV to 10^?19 cm² at 0.86 eV.     

Characterization of interface states at Ni/nCdF2 Schottky barrier type diodes and the effect of CdF2 surface preparation

Two Schottky diodes were fabricated by evaporation of nickel on to an n-type CdF₂:YF₃ semiconductor. Diode A was prepared on a slightly etched polished surface and diode B on an unpolished strongly etched surface. The current-voltage (I-V), capacitance-voltage (C-V), and conductance-voltage (G-V) characteristics were determined at room temperature. Both diodes showed non-ideal I-V behaviour with ideality factors 1.5 and 2.0, respectively and are thought to have a metal-interface layer-semiconductor configuration. Under forward bias, the admittance showed large frequency dispersion possibly caused by the interface states in thermal equilibrium with the semiconductor. Analysis of the C-V data in terms of Lehovec's model of an interface state continuum required the supposition of two time constants differing by 2 to 3 orders of magnitude. The characteristic parameters of the interface states (energy position, density, time constant and capture cross-section) were obtained for the values of the forward bias in the range 0.0 V ≦ V ≦ 0.2 V. The diode B is found to have the interface state densities about two orders of magnitude higher than the diode A which may be attributed to the different surface treatments. The C-V measurements at 100 kHz also indicated the presence of a deep donor trap about 0.6 eV below the conduction band edge in diode A.     

Influence of interface charge inhomogeneities on the measurement of surface state densities in SiSiO2 interfaces by means of the MOS a.c. conductance technique

The relationship between interface charge and surface potential of a MOS capacitor is examined when interface charge inhomogeneities are present. For practical values of the interface charge variance, the relation between interface charge and surface potential is found to be quite linear. High surface state densities and high impurity concentrations tend to damp the potential fluctuations and to increase the linearity. The magnitude of the potential deviation for a given charge deviation increases from flat band to weak inversion and decreases again in strong inversion, due to screening, but the linearity is found to be best in weak inversion.The original Nicollian-Goetzberger analysis of the MOS a.c. conductance technique uses a Gaussian potential distribution and an equivalent circuit consisting of an array of parallel surface state branches connected to a single oxide capacitance. We compare this model with a patchwork model, using a Gaussian interface charge density distribution and an equivalent circuit with distributed oxide capacitance. It is found that in depletion, for practical charge densities, the patchwork model interpretation of conductance peaks does not lead to a very different result than the random charge distribution model interpretation. Both models agree very well on surface state density and variance of the interface charge distribution, but a large discrepancy on the capture cross section of the surface states is possible.     

A quasi-three-dimensional large-signal circuit model for lateral transient analysis of MOS device

A new quasi-three-dimensional large-signal circuit model of the metal-oxide-semiconductor capacitance (MOSC) under non-equilibrium depletion or inversion bias is presented. This model is based on the threedimensional version of Sah's distributed equivalent circuit model. A simple technique of scaling the circuit elements to account for circular symmetry is shown. The circuit elements perpendicular to the MOS interface are integrated to yield a quasi-three-dimensional circuit model. The numerical analysis technique of Green and Schewchun is then used to obtain photocurrent transient responses under arbitrary signal level. Theoretical photocurrent transient calculations are in excellent agreement with experimental curves, both for the fast initial transient as well as the slow long time decay.     

NBTI reliability on high-k metal-gate SiGe transistor and circuit performances

Negative-bias temperature instability (NBTI) on high-k metal-gate SiGe p-channel MOSFETs has been examined. SiGe p-MOSFETs shows reduced interface states and enhanced NBTI reliability compared to their Si p-channel control devices as evidenced by experimental data. Impact of NBTI reliability on digital and RF circuits has been also examined using extracted fresh and stressed BSIM4 model parameters in circuit simulation. High-k metal-gate SiGe pMOSFETs demonstrate less inverter pull-up delay, smaller noise figure of a cascode low-noise amplifier, and larger output power and power-added efficiency than their Si counterparts when subject to NBTI stress.     

The influence of the interface states on the dynamic transconductance of mis-fets

A general equation is given to calculate the influence of the frequency dependent charge variation in the interface states on the dynamic transconductance of an MIS-FET. Taking the equivalent admittance of the interface states into account a differential equation is obtained using a small signal approximation. The validity of the presented solution is independent of the model of the interface states. The dispersion of the transconductance is computed for a special admittance of the interface states. The interface states give rise to an increase of the transconductance with increasing frequencies. The presented theory is in good agreement with measurements of Becke et al.     

Improvements in the Quasi-static Capacitance–Voltage Characterization of Semiconductor–Insulator Interface States (Si/SiO2)

The quasi-static capacitance–voltage determination of the electron density of states as a function of energy at the semiconductor–insulator interface is addressed. The respective effects are analyzed of random and systematic errors in a measured capacitance–voltage characteristic on the interface-state distribution derived. The random errors show up as fluctuations that grow indefinitely in magnitude as the energy approaches either band edge. Systematic errors are manifested in under- and overshoots near the band edges. The most important are the systematic errors associated with the estimation of the insulator capacitance and the identification of the relationship between the semiconductor surface potential and the applied voltage. A method for minimizing the errors is proposed. It is noted that the method should enable one to substantially expand the accessible energy range and to significantly improve the accuracy to which the density of states is evaluated. These advantages are confirmed by an experiment on the Si/SiO₂ interface. It is found that the energy range can be made as wide as about 0.9 eV and the accuracy of the semiconductor surface potential can be improved to about 0.1 meV, so that the integrated density of states can be determined to within about 5 × 10⁷ cm^–2. It is inferred from the experimental data that the interface states are concentrated near the conduction band edge and are due to positive oxide fixed ions rather than P _bcenters. The ions should act as electron traps involved in tunnel electron exchange with the conduction band of the silicon.     

Calculation of the Schottky barrier and current–voltage characteristics of metal–alloy structures based on silicon carbide

A simple but nonlinear model of the defect density at a metal–semiconductor interface, when a Schottky barrier is formed by surface defects states localized at the interface, is developed. It is shown that taking the nonlinear dependence of the Fermi level on the defect density into account leads to a Schottky barrier increase by 15–25%. The calculated barrier heights are used to analyze the current–voltage characteristics of n-M/p-(SiC)_1–x(AlN)_x structures. The results of calculations are compared to experimental data.     

Theory of transient emission current in MOS devices and the direct determination interface trap parameters

The physics is discussed of the emission of electrons from interface states in metal-insulator-semiconductor (MIS) systems, under isothermal, non-steady-state conditions. Generalized equations are then derived which permit the determination of the non-steady-state, emission current vs time characteristics for MOS systems containing an arbitrary distribution of surface states; the special case of a discrete surface state is also studied. More important, however, by appropriate plotting of the data, it is shown how to directly extract from the experimental data the energy distribution and the capture cross section of the interface traps in the upper-half of the band gap in the case of n-type semiconductors, and in the lower-half of the band gap in the case of p-type semiconductors.     

Influence of an impurity profile on the determination of interface states

In order to determine the density of interface states from C(V) curves for high test frequencies, a comparison is made with a computed curve for uniform impurity concentration but identical minimum capacitance. The curves calculated for a doping profile (due, say, to acceptor depletion near the surface of a p-type semiconductor) are assumed to represent the measured C(V) curves of MOS diodes. A number of “charges in interface states” (8 × 10¹⁰ cm^?2 in the given example) are simulated by the impurity profile. This shows that it is not sufficient to introduce a mean effective substrate impurity concentration by adapting the minimum capacitance in the inversion region.The same accordingly applies for the C(V) curves for low test frequencies. The error due to “simulated interface states” is reduced somewhat, but it remains the altered relation between the applied voltage and the surface potential.     

Theory and experiments on surface 1/f noise

A theoretical low-frequency noise model for the epitaxial-channel surface field-effect structure is presented where random modulation of the channel conductance arises from fluctuation of charges trapped at the oxide trap states near the Si-SiO2interface. In this model, charge fluctuation in the oxide traps arises from carrier tunneling between the fast interface surface states and the oxide trap states. A second fluctuation, at higher frequencies, arises from the random thermal emission and capture of electrons and holes at the fast interface states through the thermal or Shockley-Read-Hall process. Different oxide trap densities were introduced into the interface region of the metal-oxide-silicon field-effect structures using a carefully controlled and reproducible oxygen heat treatment technique. Energy distributions of the oxide trap densities are obtained from capacitance measurements. Humps are observed between the flat band and the onset of strong surface inversion (lower half of the bandgap) in both the noise power and the oxide trap density versus gate voltage (or surface band bending) plots. Theoretical noise power calculations using the experimental oxide trap density profile from the capacitance-voltage data agree very well with the experimental noise humps in both magnitudes and fine structures. It is shown that the frequency spectra of noise depend strongly on the oxide trap density profile in the oxide. It is suggested that the oxide traps are due to the excess oxygen at the SiO2-Si interface.     

Frequency-dependent electrical characteristics of GaAs MESFETs

Output resistance and transconductance of GaAs MESFETs have been observed to change significantly at very low frequencies. Extensive measurements of these characteristics as a function of device bias are reported. Direct measurements of the dispersive behavior between DC and 100 kHz and over a broad temperature range have been made on ion-implanted monolithic microwave IC (MMIC) devices. Conductance deep level transient spectroscopy (DLTS) and microwave S-parameter measurements have also been made to investigate this behavior. These measurements reveal that surface or channel-substrate interface traps in the material are most likely to be responsible for the observed behavior. A new equivalent-circuit model which accounts for many of the observed characteristics is developed. Unlike previously proposed equivalent circuits, the model does not rely on physically unrealistic circuit element values in order to obtain accurate performance predictions. The bias dependence of circuit element values is computed for one device. Effects not described by the model are also discussed     

On the equivalent circuit representation of the slittedparallel-plate waveguide filled with a dielectric

An investigation of the equivalent π circuit representation for the transverse slit in the wall of a transverse electromagnetic (TEM) parallel-plate waveguide is presented. For the narrow slit, approximate analytic expressions for the equivalent circuit parameters are given in terms of the centerline representation and, for the arbitrarily width slit, the equivalent circuit parameters are considered by the method of moments in terms of both the centerline representation and edge representation, and various characteristics of the equivalent π admittance circuit representation are discussed. A critical look is taken at the validity of the previous model of th E-plane gap coupling between two rectangular microstrip patch antennas, and the improved model is considered for the narrow slit (gap) width case     

Temperature dependence of the interface state distribution due to hot carrier effect in FinFET device

Temperature dependence of the interface state distribution due to hot carrier injection (HCI) effect in FinFET device is investigated in this paper. The interface state distribution along the FinFET channel at various temperatures is first extracted by measuring the generation-recombination (G-R) current and then the shift of interface state density with temperature is analyzed. The result shows that the density of interface states increases with elevating temperature from 28 °C to 128 °C. While the change of generation rate slows down with rising temperature and the distribution region is insensitive to both stress time and temperature. Based on the measured data, an empirical Gaussian-like model is proposed to describe the interface state distribution along the FinFET channel and good agreements with experimental data are obtained.     

Interface state density in Au-nGaAs Schottky diodes

A method for determining the surface state density in Schottky diodes taking into account both I–V and C–V data while considering the presence of a deep donor level is presented. The model assumes that the barrier height is controlled by the energy distribution of surface states in equilibrium with the metal and the applied potential and does not include, explicitly, an interfacial layer. The model was applied to extract interface state densities of Au-nGaAs guarded Schottky diodes fabricated from bulk and VPE (100) GaAs with carrier conentrations between 3 × 10¹⁵ and 8 × 10¹⁶ cm^?3. These diodes exhibited ideality (n) factors of approximately 1.02 and room temperature saturation current densities ～10^?8 A/cm². This model is in substantial agreement with forward bias measurements over the 77–360°K temperature range investigated, in that a temperature-independent energy distribution of interface states was obtained. In reverse bias the interface state model is most valid with the higher carrier concentration material and at high temperature and low bias voltage. Typical interface state densities from 0.07 eV above the zero bias Fermi level to 0.01 eV below the Fermi level were 2 × 10¹³ cm^?2 eV^?1. The validity of the model under reverse bias is restricted by a non-thermionic reverse current, thought to be enhance field emission from traps.     

Point defect determination by eliminating frequency dispersion in C–V measurement for AlGaN/GaN heterostructure

In this paper, an improved small-signal equivalent model is introduced to eliminate frequency dispersion phenomenon in capacitance–voltage (C–V) measurement, and a new mathematic method is proposed to calculate the amount of bulk defect existing in the GaN buffer layer. Compared with photoluminescence (PL) and high resolution X-ray diffraction (HRXRD) data, it is identified that the main component of the bulk defect concentration is made up of the point defect concentration, rather than the edge dislocation concentration. All these results prove the accuracy of the improved C–V model and feasibility of the mathematic model.     

用于器件描述和电路仿真的新型多晶硅TFT直流模型

提出一种新型的多晶硅薄膜晶体管电流-电压物理模型，考虑了陷阱态密度的V形指数分布,运用Lambert W函数推出了表面势的显式求解方法,大大提高了运算效率,在电路仿真中发挥了重要作用，基于指数的陷阱态密度和计算的表面势,描述了亚阈值区和强反型区的漏电流特性。推导了完整、统一的漏电流表达式,包括翘曲效应，在很广的沟道长度范围和工作区内,模型和实验数据一致。     

Theory of extrinsic and intrinsic heterojunctions in thermal equilibrium

A careful analysis of an abrupt heterojunction consisting of two distinct semiconductors either intrinsic or extrinsic is presented. The calculations apply to a one-dimensional, nondegenerate structure. Taking into account all appropriate boundary conditions, it is shown that the intrinsic Fermi level shows a discontinuity at the interface between the two materials which leads to a discontinuity of the valence band edge ΔE_v equal to the difference in the band gap energies of the two materials. The conduction band edge stays continuous however. This result is independent of possible charged interface states and in sharp contrast to the Anderson model. The reasons for this discrepancy will be discussed.