Temperature dependence of breakdown voltage in silicon abrupt p-n junctions

Temperature dependence of breakdown voltage in silicon abrupt p⁺-n junctions has been calculated using a modified Baraff theory [1]-[3] and measured experimentally from 77°K to 500°K, with substrate doping from 10¹⁵cm^-3to 10¹⁸cm^-3. Experimental data are in good agreement with the results of theoretical calculations. These results strongly substantiate the validity of the modified Baraff theory which has been pointed out by Sze and Crowell.     

Impurity distribution in high-efficiency silicon avalanche diode oscillators

The influence of impurity distribution on the performance of high-efficiency silicon avalanche diode oscillators has been investigated for a number of diffusion profiles and doping densities of ionized donors. p⁺-n-n⁺mesa diodes with diameters ranging from 0.005 to 0.030 inch, were designed with abrupt, hyperabrupt, graded, and linearly graded junctions with doping densities varying from 10¹⁴to 2 × 10¹⁵cm^-3and depletion region width 4 µm ≤ W ≤ 8 µm. The devices were operated at L-band with 40 percent efficiency. The high-frequency characteristics of the avalanche devices have shown that high-efficiency performance can be achieved with complex waveforms of current.     

Theoretical analysis of the DC avalanche breakdown in GaAs MESFET's

The channel avalanche breakdown in GaAs MESFET's has been investigated using nonstationary electron dynamics and an ionization coefficient taken as a function of average electron energy. Stationary high-field domains of different shapes and peak-field localization are calculated at the breakdown, depending on technological parameters, device geometry or gate bias. Design rules are given to obtain maximum saturated output power and a full-channel current breakdown voltage comparable to the one near pinchoff. In particular, it is found that both a recessed channel geometry and an increased gate-drain distance should yield the best device performances with a doping level not higher than about 1.2-10¹⁷cm^-3and a channel current Idssbetween 275 and 330 mA/mm.     

The breakdown voltage of double-sided p-n junctions

The avalanche breakdown voltage of an abrupt double-sided junction is a function only of Neff(the doping obtained from capacitance-voltage analysis) in a material in which the ionization rates for electrons and holes are equal or maintain a constant ratio. This doping parameter, together with the published breakdown voltage data for single-sided junctions, immediately gives the breakdown voltage of the more complex structure.     

The calculation of the avalanche multiplication factor in silicon p—N junctions taking into account the carrier generation (thermal or optical) in the space-charge region

The influence of carrier generation within the space-charge regions of silicon p-n junctions upon their breakdown characteristics is analyzed. Universal plots for the calculation of the total multiplication in one-sided silicon junctions versus voltage and substrate concentration are given, which take into account both injection and generation of initiating carriers. It is shown that the multiplication factorMof practical (i.e., generation-dominated) silicon junctions differs from the pure hole-pure electron multiplication factors Mpand Mnand ranges between them, i.e.,M_{p} < M < M_{n}. Its calculated voltage dependence is well approximated by Miller's relationship with an exponentnbetween 4 and 7 for impurity concentrations in the substrate between 10¹⁴and 10¹⁷cm^-3.     

Avalanche breakdown voltage of GaAs hyperabrupt junctions

The avalanche breakdown voltage of a GaAs hyperabrupt junction diode is calculated by using unequal ionization rates for electrons and holes, and shown graphically as a function of the parameters which characterize the impurity profile of the diode. The breakdown voltage decreases abruptly at the critical point of the characteristic length L_c which varies in accordance with the impurity concentration N₀ at X = 0. For example, the critical length L_c is 7.7 × 10⁻⁶ cm and 3.3 × 10⁻⁵ cm for N₀ = 1 × 10¹⁸ cm⁻³ and 1 × 10¹⁷ cm⁻³, respectively. The breakdown voltage of a diode with extremely short or long characteristic length can be estimated from the results for corresponding abrupt junctions. The experimental results agree well with the calculated ones.     

Surface conduction in short-channel MOS devices as a limitation to VLSI scaling

In MOS VLSI device scaling, two major limiting mechanisms are the punchthrough and source-drain breakdown. The punchthrough mechanism is generally considered a bulk-dominated effect. Drain-source avalanche breakdown is generally attributed to bipolar transistor action between drain and source, dominated by injection through the neutral substrate region. The present work includes an experimental verification and a qualitative model demonstrating that both punchthrough and drain-source avalanche breakdown limitations are surface and surface-depletion-region dominated mechanisms, respectively. The two mechanisms are treated simultaneously since both involve enhanced injection from the source due to drain-induced source-potential barrier lowering. The experimental verification is done over a wide range of relevant device parameters, channel implant concentration between 5 × 10¹⁴-1 × 10¹⁶cm^-3for punchthrough and 2 × 10¹⁵-5 × 10¹⁶cm^-3for drain-source avalanche breakdown, effective channel length of 1.0-30.0 µm for both mechanisms.     

GaSb Schottky diodes for infrared detectors

GaSb Schottky barrier photodiodes are shown to have quantum efficiency higher than 35 percent over a broad band of infra-red light wavelength shorter than 1.6 µm. Theoretical calculations of current voltage characteristics including tunneling current are compared with the experiment and it is suggested that surface leakage current, tunneling current, and avalanche breakdown, respectively, dominate the reverse characteristics with increasing voltage. Epitaxial growth of an n-type layer with carrier density 10¹⁵cm^-3and suitable surface passivation are key technologies for the application of this material to infra-red detectors.     

Avalanche region width in various structures of IMPATT diodes

The avalanche region of one-sided and two-sided abrupt junctions has been studied. These are the structures most commonly utilized for IMPATT diodes. Numerical results are presented which show that n⁺-p Si diodes have much narrower avalanche regions, due to the unequal ionization rates in Si, than the complementary p⁺-n type. The implications of these results with respect to IMPATT diode design are discussed.     

Properties of ion-implanted junctions in mercury—cadmium—telluride

The formation of n-p junctions by ion-implantation in Hg0.71Cd0.29Te is shown to be a result of implantation damage. n-p photodiodes have been made by implantation of Ar, B, Al, and P in a p-type substrate with acceptor concentration of 4 × 10¹⁶cm^-3. The implanted n-type layer is characterized by sheet electron concentration of 10¹⁴to 10¹⁵cm^-2and electron mobility higher than 10³cm². V^-1. s^-1, for ion doses in the range 10¹³-5 × 10¹⁴cm^-2. The photodiodes have a spectral cutoff of 5.2 µm, quantum efficiency higher than 80 percent, and differential resistance by area product above 2000 Ω . cm²at 77 K. The temperature dependence of the differential resistance is discussed. The junction capacitance dependence on reverse voltage fits a linearly graded junction model. Reverse current characteristics at 77 K have been investigated using gate-controlled diodes. The results suggest that reverse breakdown is dominated by interband tunneling in field-induced junctions at the surface, for both polarities of surface potential.     

Deep-depletion breakdown voltage of silicon-dioxide/silicon MOS capacitors

The deep-depletion breakdown voltage of silicon-dioxide/ silicon MOS capacitors is determined by the ionization-integral method, with potential distributions computed by two-dimensional relaxation techniques. Calculations cover the range of substrate doping between 10¹⁴and 10¹⁸cm^-3and oxide thickness between 0.01 and 5.00 µm, providing plots of breakdown voltage versus substrate impurity concentration with oxide thickness as parameter. A universal and normalized criterion is derived for field uniformity in terms of the ratio of oxide thickness to the maximum (breakdown) width of the silicon depletion region: this ratio should be larger than 0.3 in order not to have field concentration around the edges of the metal plate.     

Extended measurements of gallium arsenide breakdown characteristics using punchthrough structures

Measurements of the avalanche breakdown characteristics of gallium arsenide have been extended to carrier concentrations below 10¹⁵per cm³by using punchthrough structures. Although the earlier measured values [7] at doping levels above 10¹⁵per cm³were in close agreement with the theoretical calculations by Lee and Sze [6], the measurements performed in this study at lower doping indicate an overestimation of the breakdown voltage by about 30 percent by the theoretical analysis.     

Calculation of the diffusion curvature related avalanche breakdown in high-voltage planar p-n junctions

Avalanche multiplication calculations are performed in high-voltage planar p-n junctions to determine breakdown voltage limitations imposed by curvature effects. The issue of choice of ionization coefficient for avalanche multiplication is discussed. From the calculations, a series of design curves and equations are generated which relate the breakdown voltage and peak electric field to those of an ideal junction of the same doping profile, the critical parameters being the substrate doping concentration, the diffusion profile, and the ratio of the radius of curvature to the substrate depletion width for the ideal one-dimensional case. With appropriate distance normalization, these curves and equations can be reduced to a single curve and a single equation. The agreement between theory and experiment is consistently good provided the correct ionization coefficients are used in the theory.     

Experimental determination of the avalanche region of one-sided abrupt barriers

In this paper is presented an experimental method for the determination of the width of the avalanche region of one-sided abrupt barriers at breakdown. The ionization rates of both electrons and holes are determined using the same experiments. The method is based on multiplication measurements corresponding to a primary current coming from the highly doped side of the junction. This primary current is obtained by varying the wavelength of a light spot applied to the highly doped side. This method is used to control the avalanche behaviour of P⁺N and N⁺P Si abrupt junctions. The avalanche region and ionization rates obtained are in good agreement with values already published.     

Experimental determination of electron drift velocity in 4H-SiC p+-n-n+ avalanche diodes

4H-SiC p⁺-n-n⁺ diodes of low series resistivity (<1×10^-4 Ω·cm²) were fabricated and packaged. The diodes exhibited homogeneous avalanche breakdown at voltages U_b=250-270 V according to the doping level of the n layer. The temperature coefficient of the breakdown voltage was measured to be 2.6×10^-4 k^-1 in the temperature range 300 to 573 K. These diodes were capable of dissipating a pulsed power density of 3.7 MW/cm² under avalanche current conditions. The transient thermal resistance of the diode was measured to be 0.6 K/W for a 100-ns pulse width, An experimental determination of the electron saturated drift velocity along the c-axis in 4H-SIC was performed for the first time, It was estimated to be 0.8×10⁷ cm/s at room temperature and 0.75×10⁷ cm/s at approximately 360 K     

Calculation of cosmic ray limited maximum DC blocking voltages of high voltage silicon PIN diodes

A power law approach as used by Fulop for the treatment of impact ionization and breakdown in abrupt silicon P–N junctions [Fulop W. Calculation of avalanche breakdown voltages of silicon P–N junctions. Solid-State Electron. 1967;10:39–43] is developed in this paper to provide simple-to-use equations for the quantitative evaluation of cosmic ray related phenomena in high voltage power devices. Being empirical in nature, such approaches have no physical background and only serve the purpose of generating a simple and compact mathematical framework. The resulting compact model allows for a quick and straightforward computation of DC blocking voltages as a function of FIT rate, n-base doping and temperature. The determination of model parameters is based on the theory and data given in [Zeller HR. Cosmic ray induced failures in high power semiconductor devices. Solid-State Electron. 1995;38(12):2041–6]. With the new approach, calculating first-hand maximum DC blocking voltages for high voltage power semiconductor devices becomes as effortless as the calculation of the breakdown voltage.     

Avalanche Multiplication in InAlAs

A systematic study of avalanche multiplication on a series of In _0.52Al_0.48As p⁺-i-n⁺ and n ⁺-i-p⁺ diodes with nominal intrinsic region thicknesses ranging from 0.1 to 2.5 mum has been used to deduce effective ionization coefficients between 220 and 980 kVmiddotcm^-1. The electron and hole ionization coefficient ratio varies from 32.6 to 1.2 with increasing field. Tunneling begins to dominate the bulk current prior to avalanche breakdown in the 0.1-mum-thick structure, imposing an upper limit to the operating field. While the local model can accurately predict the breakdown in the diodes, multiplication is overestimated at low fields. The effects of ionization dead space, which becomes more significant as the intrinsic region thickness reduces, can be corrected for by using a simple correction technique     

Spin saturation and pump depletion in continuous spin-flip Raman oscillation

A saturation model of stimulated Raman scattering, of general applicability, is put forward. The model is developed with reference to spin-flip electronic Raman scattering in InSb, where the number of excitations available for Raman scattering may be small by comparison with the incident photon numbers. A rate equation technique is used to evaluate the steady-state Stokes intensity and output powers for a Gaussian pump beam. The model is extended to take account of pump depletion and the relative importance of depletion, and saturation in limiting the conversion efficiency under different conditions is brought out. By comparison with continuous wave spin-flip measurements, values are obtained for the spin-relaxation time (τs) associated with spin reversal in InSb. For 10¹⁶free carriers per cubic centimeter at 36 kG,tau_{s} sim 12ns and for 10¹⁵cm^-3at 16.9 kG,tau_{s} sim 1.3ns.     

Effect of Hydrogen implantation on polysilicon p-n junctions

The effect of hydrogen implantation on theI(V)characteristics of lateral polysilicon p-n junctions is reported. After implantation with hydrogen and annealing at 400°C, a moderate decrease in the forward current and a large decrease in the reverse current is observed. In addition, the reverse breakdown voltage is increased. Best results were obtained for hydrogen dose of 10¹⁶cm^-2. The measurements are explained by considering both electric field enhancement of emission and capture rates and the generation of new trap levels by ion implantation.     

Avalanche breakdown in silicon diffused junctions

In silicon erfc or gaussian diffused junctions, as well as in linearly graded and step junctions, avalanche breakdown voltage is given approximately by V_B = (5.8 × 10⁴) X_T^0.84 where X_T is total depletion-layer thickness in cm and V_B is breakdown voltage in volts. This expression holds to ±9 per cent for plane junctions in the range 15 V to 1 kV, as indicated in Fig. 6, and should be useful to the practical device designer. The quantity X_T for a diffused junction of the erfc type can be obtained from Fig. 3, which extends the range of previously published curves and is somewhat easier to read as well. This chart and Fig. 4, which gives peak field , can be used to estimate quantitatively the departure of such a diffused junction from pure step or pure graded behavior. The generalized V_B-X_T relationship is based in part on the results of Sze and Gibbons. When their expressions for V_B in step and linearly graded junctions are recast in terms of X_T (instead of doping N_B and gradient a, respectively) these reduce to power-law expressions differing only in numerical coefficient ( 10 per cent difference). The expression's upper range, 300–1000 V, is based upon the recent diffused-junction data of van Overstraeten and de Man, and the lower range, 15–300 V, is also consistent with the experimental data of Miller on step junctions and Carlson on diffused junctions. Carlson's observations were made in about 1959 on large numbers of commercial diodes and have not previously been generally available. These sets of experimental data are compared with the calculated results of the workers mentioned above, plus the diffused-junction results of Kennedy and O'Brien.