容忍单粒子多节点翻转的三模互锁加固锁存器

为了能够容忍单粒子多节点翻转,提出了一种新颖的三模互锁加固锁存器。该锁存器使用具有过滤功能的代码字状态保存单元（CWSP）构成三模互锁结构,并在锁存器末端使用CWSP单元实现对单粒子多节点翻转的容错。HSPICE仿真结果表明,相比于三模冗余（TMR）锁存器,该锁存器功耗延迟积（PDP）下降了58.93%;相比于容忍多节点翻转的DNCS-SEU锁存器,该锁存器的功耗延迟积下降了41.56%。同时该锁存器具有较低的工艺偏差敏感性。     

基于COTS的空间信息处理平台抗辐射关键技术研究

针对空间辐射环境下的单粒子效应,研究了基于FPGA的抗SEU多级容错机制的关键技术,并设计芯片、板级两级监测的抗SEL保护电路;通过在嵌入式空间信息处理平台原型系统中的验证实验,结果表明:设计合理,且有效地提高了系统的抗辐射能力。     

双模冗余汉明码的设计与验证

集成电路芯片工作在电磁环境复杂的空间环境中,容易受到高能粒子的影响发生软错误.在芯片内,存储单元所占面积超过一半以上,对存储器单元进行加固是提升芯片可靠性的重要途径之一.因此,本文对汉明码做出改进,提出了一种双模冗余汉明码,该方法能够修正存储单元中出现的一位翻转和两位翻转.首先,对汉明码编码模块进行逻辑优化,有效减少了编码电路的延迟,再把该模块生成的校验码进行双模冗余处理,作为双模冗余汉明码编码模块的输出.之后依据汉明码解码规则分别对每份校验码与原码的组合进行处理,得到修正后的数据位与两位翻转标志位.通过分析发现当两位翻转未同时发生在原码内时,可以依据两位错误标志位的值得到正确的输出.最后,采用版图分割技术消除了两位原码同时翻转的情况,进一步提高了存储器的可靠性.在本文中,分别实现了字长为4、8和11的双模冗余汉明码,并与其它修正码的性能进行比较,结果表明:它们的电路延迟分别为8位字长汉明码的85%、89%和96%,低于两位修正能力的BCH码.     

Architecture design for reliable and reconfigurable FPGA-based GNC computer for deep space exploration

SRAM (static random access memory)-based FPGA (field programmable gate array), owing to its large capacity, high performance, and dynamical reconfiguration, has become an attractive platform for SoPC (system on programmable chip) development. However, as the configuration memory and logic memory of the SRAM-based FPGA are highly susceptible to SEUs (single-event upsets) in deep space, it is a challenge to design and implement a highly reliable FPGA-based system for spacecraft, and no practical architecture has been proposed. In this paper, a new architecture for a reliable and reconfigurable FPGAbased computer in a highly critical GNC (guidance navigation and control) system is proposed. To mitigate the effect of an SEU on the system, multi-layer reconfiguration and multi-layer TMR (triple module redundancy) techniques are proposed, with a reliable reconfigurable real-time operating system (SpaceOS) managing the system level fault tolerance of the computer in the architecture. The proposed architecture for the reconfigurable FPGA-based computer has been implemented with COTS (commercial off the shelf) FPGA and has firstly been applied to the GNC system of a circumlunar return and reentry flight vehicle. The in-orbit results show that the proposed architecture is capable of meeting the requirements of high reliability and high availability, and can provide the expressive varying functionality and runtime flexibility for an FPGA-based GNC computer in deep space.     

Low power and high write speed SEU tolerant SRAM data cell design

As feature size scales down, reliability issues like single event upset(SEU) have become serious for circuit and system designers, especially for those who work on memory and latch designs. In this paper, an improved SEU tolerant data cell design based on the Quatro-10 T cell is proposed. The introduced cell enhances the capability of SEU tolerance by weakening the key transistors in the feedback loop to block the effects of transient fault. Simulation results show that our proposed design achieves obvious higher resilience to SEU and better performance on speed and power dissipation at the expense of an increased area. The proposed cell is a fully SEU immune design with an amount of critical charge at least 7 times more than the Quatro-10 T cell and has the lowest Power Delay Product. It shows that our design is very suitable in high-performance circuit and system design.     

Single channel blind source separation based on ICA feature extraction

A new technique is proposed to solve the blind source separation (BSS) given only a single channel observation. The basis functions and the density of the coefficients of source signals learned by ICA are used as the prior knowledge. Based on the learned prior information the learning rules of single channel BSS are presented by maximizing the joint log likelihood of the mixed sources to obtain source signals from single observation, in which the posterior density of the given measurements is maximized. The experimental results exhibit a successful separation performance for mixtures of speech and music signals.     

基于变结构/输入成形的航天器振动抑制方法

针对挠性航天器大角度姿态机动的振动抑制问题,提出了一种基于输出反馈变结构控制和输入成形振动抑制方法相结合的主动振动控制策略.首先,采用拉格朗日方法建立中心刚体上带有弹性附件的航天器的动力学模型.然后,在基于非线性和低阶模态的动力学模型基础上,考虑挠性结构模态不可测的情况,为了避免设计状态观测器及其引入的误差,在输出反馈变结构控制的基础上,给出了滑模存在条件以及仅利用输出信息的变结构控制器设计方法,使系统的状态轨迹达到滑动平面,并保证闭环系统渐近稳定;在此基础上,应用输入成形方法设计成形控制器来抑制该系统的振动,使得航天器星体姿态和挠性附件的振动同时得到了有效的控制.该成形控制器的设计仅需闭环系统的振动频率和阻尼.将该方法应用于单轴挠性航天器的大角度rest-to-rest(静止到静止)姿态机动控制进行了仿真研究,结果表明,方法可行有效.     

PKI/PMI支持多模式应用的单点登录方案

提出了支持C/S和B/S应用的SSO单点登录方案。认证和授权基于PKI和PMI,服务端以中间件的方式实现认证、鉴权、审计功能,引进了SAML交换认证和鉴权信息;客户端则采用安全Cookie、共享内存与ticket技术实现多模式跨域的SSO解决方案。该方案具有更高的安全性,更为全面的解决多模式的单点登录问题,因而具有广泛的应用前景。     

内模自适应卡尔曼滤波新方法及其在GPS信号估计中的应用

针对混杂有确定性扰动分量的随机信号处理问题,提出一种基于内模的自适应卡尔曼滤波新方法──－内模自适应卡尔曼滤波法．首先将待估有用信号和观测数据中的确定性扰分量分别以分段正弦曲线拟合方 式建立各自的内模,并将这些内模的参数作为增广状态变量形成新的非线性系统模型．然后采用迭代型推广卡 尔曼滤波算法,同时实现有用信号及扰动内模参数的实时跟踪．机动目标跟踪的ＧＰＳ定位信号估计应用表明, 与现有方法相比新方法可显著提高定位精度．     

基于正交频分复用的单频蜂窝网结构与性能分析

为了改善传统GSM（global system for mobile communication）系统的性能，将基于正交
频分复用的单频网技术应用到GSM系统中，提出了一种单频蜂窝网结构。在下行链路中，相邻三个基站以
宏分集的方式构成单频蜂窝，向移动台广播下行数据；在上行链路中，采用选择性分集的接收方式，由接
收条件最好的基站接收上行数据。仿真结果表明，这种新型网络结构减少了移动过程中的切换次数，降低
了呼叫阻塞概率和掉话概率，提高了系统容量。     

Analysis on Biological Stability and Influencing Factors of Northern Living District Water Distribution System

多柔性连杆机械臂的自抗扰控制

刘延芳^1,2, 刘宏¹,孟瑶³

（1. 哈尔滨工业大学 机器人技术与系统国家重点实验室,哈尔滨 150001;

2.哈尔滨工业大学 航天学院,哈尔滨 150001;

3.上海宇航系统工程研究所,上海 201109）

创新点说明

将自抗扰控制应用到多柔性连杆机械臂的运动控制上。

研究目的

主要解决多柔性连杆机械臂的运动控制问题,在转角运动控制的同时,抑制柔性臂杆的振动。

研究方法

首先基于时标分离,将系统分解为快时标系统和慢时标系统：快时标系统为内环,采用最优二次型控制器,实现臂杆振动的快速抑制;慢时标系统为外环,采用自抗扰控制,抑制系统外界干扰、未建模动态等内外扰动,实现转角位置的精确控制。

结 果

采用自抗扰控制器可以显著提高转角控制精度,并抑制臂杆的振动,其中自抗扰控制器中采用飞线性PD控制器时,优势更为明显。

结 论

自抗扰控制器在应用于多柔性连杆机械臂的运动控制中具有一定的优势,可以进行工程推广。

关键词：多柔性连杆机械臂;自抗扰控制;飞线性比例微分控制器;跟踪微分器;状态扩张观测器

     

探测小卫星的星载计算机多级保护系统设计

一般对星载计算机都要求生高,重量轻,体积小,功耗低。对小型探测卫星来说这种要求更强烈,希望硬件设计尽量少用或不用冗余系统来保证可靠性。本文研究尽量少采用硬件科而采用看门狗措施来保证星载系统可行一的方法。     

基于内存页面动态合并的旁路转换缓冲器设计

针对内存管理中虚拟页面和物理页面连续分配的特性,提出可对相邻页面进行动态合并的旁路转换缓冲器（TLB）设计方法.该方法的核心思想是在处理器运行过程中,通过对相邻页面的递归合并,动态扩展单个TLB表项的地址映射范围,提高TLB表项的利用率并降低TLB缺失率.在两级TLB架构中,提出基于快速uTLB（fuTLB）和影子uTLB（suTLB）动态切换的新型uTLB结构,作为两级TLB架构的一级缓存,为页面动态合并提供现场和载体,页面合并过程对软件透明.基于Mibench测试基准的实验结果表明,与filter-TLB架构相比,该页面动态合并方法可以平均降低TLB缺失率达27%.     

基于简化记忆多项式预失真技术的功放设计

为了降低功放非线性失真和记忆效应,减小模型的复杂度,结合记忆多项式模型(MP)、动态偏离降低模型和通用记忆多项式模型(GMP)的参数构成特点,提出了一种基于简化记忆多项式模型的预失真设计.仿真实验表明,简化模型预失真性能优于MP模型和动态偏离降低模型,与GMP模型相当,简化模型有效减少了参数数量,在相同ADS仿真条件下,非线性阶数都为9、记忆深度都为4时,简化GMP模型参数数量比MP模型减少了9个,比动态偏离降低模型减少了49个,比GMP模型减少了11个.     

Maneuver and vibration reduction of flexible spacecraft using sliding mode/command shaping technique

The current trend of spacecraft is to use large,complex, and light-weight space structures to achieveincreased functionality at a reduced lunch cost. Thisresults in these space structures being extremely flexibleand having lowfundamental vibration modes, and thesemodes are often excited during normal on-orbit opera-tions, such as attitude maneuvers, and so on, especial-ly, when the spacecraft attitude control system employson-off thrusters that produce discontinuous and nonlin-ear control actio…     

改进“峰”方法的多元状态估计技术用于电站风机状态监测

针对风机状态监测问题,提出一种基于多元状态估计和相似性测度的方法。首先建立正常工况下各监测参数之间的关联模型,构造正常工况下的记忆矩阵;然后根据系统当前观测向量与记忆矩阵之间的相似性程度,对当前观测向量进行估计。通过对正常工况下的监测参数的聚类中心的提取,计算估计值与聚类中心的相似性测度值,确定风机工作状态。最后,以山西某电厂送风机为监测对象进行应用研究,结果表明该方法可以准确估计风机振动状况,尽早发现设备异常,实现风机状态的在线监测。     

一种可用于RFID系统中的方向回溯阵列设计

通过射频混频技术实现单元相位共轭的方式,设计了一个C波段方向回溯阵列,采用收发共用天线单元减小阵列体积．混频模块基于输入/输出共用端口的场效应晶体管混频器完成相位共轭,引入定向耦合器用于提高收发端口的隔离度并抑制射频泄露信号,该阵列具有成本低、体积小、隔离度高、作用距离远等优点．制作了四元方向回溯阵列,在发射信号频率为5.81GHz、本振信号频率为11.6GHz时,进行了测试,结果表明,该阵列在±33°入射角度范围内具有良好的方向回溯功能,可应用于射频识别系统中．     

一种可验证的矢量空间动态密钥共享方案

提出了一种可验证的矢量空间密钥共享方案,其安全性依赖于椭圆曲线密码的安全性。该方案具有如下特点:使(t,n)门限密钥共享方案中受托人的权限必须相同的前提条件可以推广到一般的情况;提供了验证的手段,可以检验出密钥分发者或密钥受托人的欺诈行为;分发的子密钥通过椭圆曲线密码进行了加密,使得受托人掌握的子密钥是加密后的密文形式,增强了安全性;同时,由于椭圆曲线密码体制具有加密强度高、密钥短的优点,使得该方案特别适合于计算、存储、带宽要求严格的场合。     

Research on Simulation and Prediction of Internal Combustion Engine Structural Acoustic Radiation

With the purpose of efficiently predicting structural radiated noise of internal combustion engine(I.C.E.), a new simulation technique is introduced, which is an approach based on boundary element method(BEM), acoustic transfer vector(ATV) technique and coupled boundary element model and finite element model (BEM-FEM) approach. Analyses of vibration exciting loads, computing structural dynamic characteristics and dynamic responses have led to theoretical results, which are tested on an L6 diesel engine to validate this proposed technique in engineering practice.     

Highly efficient VLSI architecture for DWT with low-storage implementation

With the gradual increase in image resolution of the spacecraft camera, it is highly required to figure out the problem how to process a huge amount of image data on board at a high speed. As a solution, the CCSDS proposes a space-oriented image-coding standard. For the sake of high image-coding performance, it adopts wavelet transformation as a method of image data transformation. However, wavelet transformation contains multi-level data processing, which causes more computational time consumption and more memory utilization. In order to solve this problem, we propose a highly efficient VLSI architecture for DWT with low-storage. By revising the traditional lifting structure and employing time-multiplex data processing strategy to perform the second and third level of wavelet transformation by the same logic module, the usage of logic resource is reduced with no sacrifice on speed.Using a small amount of on-chip memory instead of off-chip memory to save certain parts of DWT coefficients and sending the coefficients in a specific sequence to entropy coder timely, the off-chip memory for storage of DWT coefficients is no longer required. The proposed VLSI architecture of DWT is already implemented on the Xilinx FPGA XC4VSX55, which can achieve a high performance, in terms of data throughput, reaching 95.91MPixels/s.