ICP刻蚀对光刻胶掩模及刻蚀图形侧壁的影响

采用AZ1500光刻胶作为掩模对GaAs和InP进行ICP刻蚀,研究了刻蚀参数对光刻胶掩模及刻蚀图形侧壁的影响。结果表明,光刻胶的碳化变性与等离子体的轰击相关,压强、ICP功率和RF功率的增加以及Cl2比例的减小都会加速光刻胶的碳化变性,Cl2/Ar比Cl2/BCl3更易使光刻胶发生变性。对于GaAs样品刻蚀,刻蚀气体中Cl2含量越高,刻蚀图形侧壁的横向刻蚀越严重。Cl2/BCl3对GaAs的刻蚀速率比Cl2/Ar慢,但刻蚀后样品的表面粗糙度比Cl2/Ar小。刻蚀InP时的刻蚀速率比GaAs样品慢,且存在图形侧壁倾斜现象。该工作有助于推动在器件制备工艺中以光刻胶作为掩模进行ICP刻蚀,从而提高器件制备效率。     

ICP刻蚀GaN侧壁倾角以及刻蚀速率的控制

深入研究了Cl2基气体电感耦合等离子体(ICP)刻蚀系统对于GaN材料侧壁倾角的控制以及刻蚀速率的影响。通过调整ICP离子源功率、射频功率、气体流量、腔室压力等参数,经实验验证,实现了从23°～83°侧壁倾角的大范围工艺控制,为GaN基器件工艺提供了有益指导。     

Cl2/Ar感应耦合等离子体刻蚀Si工艺研究

采用Cl2/Ar感应耦合等离子体（ICP）对单晶硅进行了刻蚀,工艺中用光刻胶作掩膜。研究了气体组分、ICP功率和RF功率等工艺参数对硅刻蚀速率和硅与光刻胶刻蚀选择比的影响,同时还研究了不同工艺条件对侧壁形貌的影响。结果表明,由于物理刻蚀机制和化学刻蚀机制的相对强度受到混合气体中Cl2和Ar比例的影响,硅刻蚀速率随着Ar组分的增加而降低,同时选择比也随之降低。硅刻蚀速率随着ICP功率的增大先增大继而减小,选择比则成上升趋势。硅刻蚀速率和选择比均随RF功率的增大单调增大。在Cl2/Ar混合气体的刻蚀过程中,离子辅助溅射是决定硅刻蚀效果的重要因素。同时,文中还研究分析了刻蚀工艺对于微槽效应和刻蚀侧壁形貌的影响,结果表明,通过提高ICP功率可以有效减小微槽和平滑侧壁。进一步研究了SiO2掩膜下,压强改变对于硅刻蚀形貌的影响,发现通过降低压强,可以明显地抑制杂草的产生。     

GaAs通孔刻蚀微掩模形成机理研究

通孔刻蚀是GaAs制造工艺的重要环节,通过通孔刻蚀工艺实现GaAs背面和正面金属导通互连。在通孔刻蚀工艺中,微掩模的形成对器件性能及可靠性产生不利影响。微掩模将阻碍GaAs刻蚀,形成柱状堵孔以及侧壁聚合物等,造成后续背面金属接触不良、粘附不牢,进而影响通孔接触电阻、电感等关键参数,最终影响器件性能及可靠性。分析了GaAs微掩模形成的主要原因和形成机理,通过工艺优化解决了通孔刻蚀堵孔及侧壁聚合物等问题,从而提高了器件性能及可靠性。     

RIE工艺参数对4H-SiC刻蚀速率和表面粗糙度的影响

基于4H-SiC材料的微机电系统(MEMS)器件(如压力传感器、微波功率半导体器件等)在制造过程中,需要利用干法刻蚀技术对4H-SiC材料进行微加工.增加刻蚀速率可以提高加工效率,但是调节刻蚀工艺参数在改变4H-SiC材料刻蚀速率的同时,也会对刻蚀表面粗糙度产生影响,进而影响器件的性能.为了提高SiC材料的刻蚀速率并降低刻蚀表面粗糙度,满足4H-SiC MEMS器件研制的需求,本文通过优化光刻工艺参数(曝光模式、曝光时间、显影时间)获得了良好的光刻图形形貌,改善了刻蚀掩模的剥离效果.实验中采用SF6和O2作为刻蚀气体,镍作为刻蚀掩模,分析了4H-SiC反应离子刻蚀工艺参数(刻蚀气体含量、腔体压强、射频功率)对4H-SiC刻蚀速率和表面粗糙度的影响.实验结果表明,通过优化干法刻蚀工艺参数可以获得原子级平整的刻蚀表面.当SF6的流量为330 mL/min,O2流量为30 mL/min,腔体压强为4 Pa,射频功率为300 W时,4H-SiC材料的刻蚀速率可达到292.3 nm/min,表面均方根粗糙度为0.56 nm.采用优化的刻蚀工艺参数可以实现4H-SiC材料的高速率、高表面质量加工.     

垂直腔面发射激光器中GaAs/AlGaAs的选择性刻蚀技术研究

在氧化物限制型垂直腔面发射激光器制备中,刻蚀GaAs/AlGaAs时因异质型材料常出现选择性内蚀现象,这会直接影响后续的氧化工艺及电极钝化的效果。针对因选择性内蚀而出现的"镂空"现象,对湿法刻蚀工艺和干法刻蚀工艺进行详细研究,研究结果表明通过调整刻蚀液体积配比和感应耦合等离子体(ICP)刻蚀下电极射频功率可有效消除"镂空"现象。湿法刻蚀中,当刻蚀液H_3PO_4-H_2O_2-H_2O各物质体积配比为1\:1\:10时,得到了陡直度较好且光滑的侧壁。ICP干法刻蚀时,通过改变下电极RF功率可调整腔室内的化学刻蚀和物理刻蚀的动态平衡,在下电极射频功率为100 W时,"镂空"现象基本消失,且侧壁陡直度大于80°。     

6H-SiC体材料在SF_6/O_2混合气体中的ICP刻蚀

采用SF6/O2作为刻蚀气体,对单晶6H-SiC材料的感应耦合等离子体(ICP)刻蚀工艺进行了研究。分析了ICP功率、偏置电压、气体混合比等工艺参数对刻蚀速率和刻蚀质量的影响。结果表明,刻蚀速率随着ICP功率及偏置电压的增大而提高,刻蚀表面质量随偏置电压及O2的含量的增大而降低,而ICP功率的变化对刻蚀质量影响不大。混合气体中O2含量为20%时刻蚀速率达到最大值,同时加入氧气后形成易于充电的SiFxOy中间层,从而促进了微沟槽的形成。     

GaAs/AlGaAs多层膜刻蚀的陡直度

GaAs/AlGaAs多层膜的陡直度较大程度地关系到其实际应用效果,但在实际加工中较难控制,因此有必要研究刻蚀过程中一些主要因素对其陡直度的影响。结合具体工作情况,用AZ1500光刻胶作为掩模,GaAs/Al0.15Ga0.85As多层膜为刻蚀材料,分别使用湿法和干法对其进行刻蚀。湿法刻蚀的刻蚀剂为H3PO4+H2O2溶液,干法刻蚀采用感应耦合等离子体(ICP)刻蚀法,等离子体由Cl2+BCl3(蒸汽)混合气体电离形成。通过控制变量方法,发现湿法刻蚀中刻蚀剂配比和温度以及干法刻蚀中BCl3(蒸汽)流量对刻蚀陡直度的影响规律。由此得出,提高H3PO4所占比例和降低刻蚀温度虽然会降低刻蚀速率,但可以提高多层膜的陡直度;ICP刻蚀的陡直度优于湿法刻蚀,BCl3(蒸汽)的流量在一定范围内对刻蚀陡直度的影响较小。     

Cl_2/BCl_3ICP刻蚀GaN基LED的规律研究

研究了用Cl2/BCl3刻蚀GaN基LED中,工艺参数对GaN刻蚀速率、刻蚀侧壁和GaN与SiO2刻蚀选择比的影响。研究结果表明,刻蚀速率随着ICP功率和压强的增大先增大继而减小,随RF功率的增大单调增大;刻蚀选择比随ICP功率增大单调减小,随压强增大而增大。还研究了刻蚀速率和选择比与气体比例变化的关系。刻蚀SEM图表明,压强和RF功率增大会使刻蚀垂直度增大。     

感应耦合等离子刻蚀二维低纳米级GaAs基光子晶体的过程优化研究

本文主要描述了用感应耦合等离子刻蚀系统（ICP）制作具有低纳米级空气孔阵列二维GaAs基光子晶体的过程。通过改变ICP功率,RF功率以及腔压三个参数,对光子晶体空气孔的侧壁和表面特性进行了系统的研究。结果表明,ICP功率的变化对空气孔侧壁和表面光滑度没有明显的影响,相反,RF功率和腔压对其起着重要的作用。最后通过优化各种过程参数,成功地获得了具有垂直平滑,直径约为130nm空气孔的光子晶体。本文ICP系统参数对光子晶体特性的影响主要通过扫描电镜进行分析,另外这种制作方法不局限于GaAs 基光子晶体,也可以应用于其它材料光子晶体的制作.     

Etching of As- and P-based III–V semiconductors in a planar inductively coupled BCl<Subscript>3</Subscript>/Ar plasma

A parametric study of the etch characteristics of Ga-based (GaAs, GaSb, and AlGaAs) and In-based (InGaP, InP, InAs, and InGaAsP) compound semiconductors in BCl₃/Ar planar inductively coupled plasmas (ICPs) was performed. The Ga-based materials etched at significantly higher rates, as expected from the higher volatilities of the As, Ga, and Al trichloride, etch products relative to InCl₃. The ratio of BCl₃ to Ar proved critical in determining the anisotropy of the etching for GaAs and AlGaAs, through its effect on sidewall passivation. The etched features in In-based materials tended to have sloped sidewalls and much rougher surfaces than for GaAs and AlGaAs. The etched surfaces of both AlGaAs and GaAs have comparable root-mean-square (RMS) roughness and similar stoichiometry to their unetched control samples, while the surfaces of In-based materials are degraded by the etching. The practical effect of the Ar addition is found to be the ability to operate the ICP source over a broader range of pressures and to still maintain acceptable etch rates.     

Etching behavior of GaAs/AlGaAs multilayer structure during laser beam scanning

The thermochemical etching behavior of GaAs/AlGaAs multilayer structure during laser beam scanning has been studied. The etch rate changes between GaAs and AlGaAs epilayers as the etching process proceeds through the layered sample. The phenomenon can be explained by the difference of thermal parameters of the heterojunction interface. The local temperature rise from laser irradiation has been calculated to investigate etching characteristics for GaAs and AlGaAs. It is concluded that the good thermal confinement at GaAs/AlGaAs interface produces the wider etch width of GaAs layer than that of AlGaAs layer in GaAs/AlGaAs multilayer. The maximum etch rate of the GaAs/AlGaAs multilayer was 32.5 μm/sec and the maximum etched width ratio of GaAs to AlGaAs was 1.7.     

3-mm double-heterojunction microwave power HEMT fabricated byselective RIE

Current-voltage and initial RF measurements are presented on a double-heterojunction HEMT (high-electron-mobility transistor) structure designed for power MMIC applications. The device structure is grown by molecular-beam epitaxy and uses a spatially variant superlattice to improve the performance of the inverted AlGaAs/GaAs interface. Gate recessing is achieved using a hybrid wet-chemical selective dry etching process. For selective dry etching, reactive ion etching with a >600:1 selectivity for GaAs over AlGaAs is used to control the recess depth. The room temperature DC characteristics for a 3-mm power FET (0.7- μm gate) display an I_dss of 370 mA/mm, a peak transconductance of 180 mS/mm, and a maximum gate-to-drain breakdown of 22 V. Large-signal microwave measurements at 5.5 GHz yielded a saturated output power of 1.3 W (31.2 dBm), 8.3-dB large-signal gain, and a peak power-added efficiency of 55%     

台面型自对准结构AlGaAs/GaAs HBT的工艺研究

本文提出了一种台面型全自对准结构AlGaAs/GaAs HBT的制造方案,对其中的欧姆接触金属系统的制备.AlGaAs/GaAs材料的选择性腐蚀及聚酰亚胺的反应离子刻蚀终点监控等关键工艺技术进行了研究。并给出了应用该工艺研制的HBT器件的初步结果.     

Characterization of AlGaAs microstructure fabricated by AlGaAs/GaAsmicromachining

An AlGaAs/GaAs micromachining technique that is compatible with laser diode fabrication process is described. AlGaAs structural layers and GaAs sacrificial layers are prepared by metal organic vapor phase epitaxy. Reactive dry etching with chlorine is used to fabricate high-aspect structures. Peroxide/ammonium hydroxide solution is used for selective etching of the sacrificial layer. Since the epitaxial layer has low stress, precise undeformed microstructures are obtained. Good compatibility with the LD process makes it possible to integrate microcantilever beams with LD's without degradation of LD characteristics. Microcantilever beams of AlGaAs are characterized by directly measuring stiffness and natural frequencies. A fracture test is also performed on the AlGaAs microcantilever beams. The average fracture stress of AlGaAs is found to be 1 GPa at 1% strain, which shows that the material is strong enough to support the micrometer scale structures     

InAs/GaSb Ⅱ类超晶格长波焦平面阵列台面ICP刻蚀技术研究

本文采用SiO₂/SiN作为掩膜对InAs/GaSbⅡ类超晶格红外材料进行感应耦合等离子体（ICP）刻蚀条件研究,得到InAs/GaSbⅡ类超晶格较好的刻蚀条件以提升红外探测器性能。对ICP刻蚀过程中容易出现台面侧向钻蚀以及台面底部钻蚀两种现象进行了详细研究,通过增加SiO₂膜层厚度以及减小Ar气流量,可有效减少台面侧向钻蚀;通过减小下电极射频功率（RF）,可有效消除台面底部钻蚀。采用适当厚度的SiO₂/SiN掩膜以及优化后的ICP刻蚀参数可获得光亮平整的刻蚀表面,表面粗糙度达到0.193 nm;刻蚀台面角度大于80°,刻蚀选择比大于8.5:1;采用优化后的ICP刻蚀条件制备的长波640×512焦平面器件暗电流密度降低约1个数量级,达到3×10－4 A/cm2,响应非均匀性、信噪比以及有效像元率等相关指标均有所提高,并获得了清晰的焦平面成像图。     

Uniform, high-gain AlGaAs/In0.05Ga0.95As/GaAsP-n-p heterojunction bipolar transistors by dual selective etch process

AlGaAs/InGaAs/GaAs P-n-p heterojunction bipolar transistors (HBTs) have been fabricated using a dual selective etch process. In this process, a thin AlGaAs surface passivation layer surrounding the emitter is defined by selective etching of the GaAs cap layer. The InGaAs base is then exposed by selective etching of the AlGaAs emitter. The resulting devices were very uniform, with current gain varying by less than ±10% for a given device size. Current gain at a given emitter current density was independent of device size, with gains of over 200 obtained at current densities above 5×10⁴ A/cm ²     

Bromine ion-beam-assisted etching of III–V semiconductors

Bromineion-beam-assisted etching produces smooth vertical sidewalls in GaAs, GaP, InP, AlSb, and GaSb as well as in the usual alloys formed from these materials. Care must be taken, however, during etching to match the specific material system with an appropriate substrate etch temperature. For example, vertical walls were obtained using substrate temperatures in the range of 150 to 200°C with InP, 80 to 140°C with GaAs and GaP, and below 30°C with AlSb and GaSb. GaN has also been etched with the technique. Our etching experience and the vapor pressure data for bromine with group III and group V elements lead us to believe that all of the various technologically important III-V binaries, ternaries, and quaternaries can be etched. Etch rates of most of the materials can be varied from several nm/min to 0.16 μm/min through the bromine flow rate, Ar⁺ ion beam density and energy, and the substrate temperature. Bromine ion-beam-assisted etching also appears to have an advantage over chlorine ion-beam-assisted etching in many situations, in that substrate temperature ranges can be found for which vertical sidewalls are maintained while etching through layered structures composed of various alloys of the materials. Here we present results obtained from etching a number of III-V binaries, alloys, and heterostructures.