Guide lines for the selection of acoustooptic materials

Guide lines are presented for the selection of promising new acoustooptic materials for device applications. Previously, the selection of materials was based primarily on availability and intuition. Now it is possible to estimate an approximate acousto-optic figure of merit for a material knowing only its chemical composition and density. One of the first applications of these guide lines led to a detailed evaluation of lead molybdate, PbMoO4, a material known to have certain desirable physical properties. The results verified that PbMoO4has a high figure of merit, considerably greater than LiNbO3though somewhat less than α-HIO3. In addition to a high figure of merit, a material must also have a low acoustic loss if it is to be useful for device applications. The relationship between the acoustooptic figure of merit and acoustic loss is explored. Although only limited loss data are presently available, it is concluded that a high figure of merit and low loss are compatible material properties for applications below approximately 0.5 GHz. However, as future applications call for higher frequency operation, it appears that a tradeoff between low acoustic loss and high figure of merit will be required.     

碲酸盐系统玻璃的研究进展

在非线性光学玻璃材料中,碲酸盐系统玻璃材料凭借较高的三阶非线性光学极化率、超快光学响应、较宽的红外透过窗口、较好的化学稳定性和较低的熔化温度而备受关注,以铌碲酸盐系统为基础的新型碲酸盐系统重金属氧化物玻璃则表现出更为优秀的综合品质,极有希望成为制作新型光学器件的理想材料。     

Power semiconductor device figure of merit for high-frequencyapplications

A figure of merit (the Baliga high-frequency figure of merit) is derived for power semiconductor devices operating in high-frequency circuits. Using this figure of merit, it is predicted that the power losses incurred in the power device will increase as the square root of the operating frequency and approximately in proportion to the output power. By relating the device power dissipation to the intrinsic material parameters, it is shown that the power loss can be reduced by using semiconductors with larger mobility and critical electric field for breakdown. Examination of data in the literature indicates that significant performance improvement can be achieved by replacing silicon with gallium arsenide, silicon carbide, or semiconducting diamond     

Modeling and characterization of SIPOS emitter and quasi-SISemitter bipolar transistors

SIPOS (semi-insulating polycrystalline Si) emitter bipolar transistors have been fabricated with a common-emitter current gain of 8000 and a figure of merit (gain divided by intrinsic base sheet resistance) of 200 (kΩ/sq)^-1. The high gain is attributed to a relatively low interface recombination velocity of the emitter contact, as measured by photo-induced microwave reflectometry. The cutoff frequency is measured to be 250 MHz, the low value attributed to a large emitter contact resistance of the SIPOS emitter. The authors suggest that a new figure of merit-transconductance divided by emitter resistance-should be considered for the comparison of the high-frequency performances of high emitter efficiency bipolar transistors. A quasi-SIS semiconductor-insulator-semiconductor emitter bipolar with a poly-Si emitter and undoped SIPOS as an interfacial layer was also fabricated. By incorporating a field-enhancement factor in the SIPOS, the behavior of this transistor is successfully explained by a SIS emitter model. The ideality factor ratio in the Gummel plot is attributed to the different barrier heights of electrons and holes at the SiO₂/n-Si interface     

Optimal Electrical Conductivity for Maximum Thermoelectric Figure of Merit

A frequently employed approach for determination of the maximum thermoelectric figure of merit of a material involves a calculation of its maximum electrical power factor and the corresponding thermal conductivity. In this study, we show that the thermoelectric figure of merit determined using this approach is likely to be limited by the Lorenz factor. The maximum thermoelectric figure of merit is achieved at a different electrical conductivity. A simple way of estimating the optimal electrical conductivity for obtaining the maximum thermoelectric figure of merit is presented.     

A direct measurement of interfacial contact resistance

A method is described for directly measuring interfacial contact resistance and estimating the degree of uniformity of the interfacial layer in metal-semiconductor contacts. A two-dimensional resistor network model is used to obtain a relationship between the specific contact resistance and the measured interfacial contact resistance for contacts with a homogeneous interfacial layer. Measurement results are given for 98.5% Al/1.5% Si and 100 % Al contacts on n-type silicon.     

Low-power chip interconnection by dynamic termination

A low-power dynamic termination scheme is proposed and demonstrated as a way to reduce power dissipation for high-speed data transport. In this scheme, the transmission lines are terminated only if the signals change. The gate of a switching MOS transistor connected to a termination resistor is driven by differentiating the transmission signal with a resistor and a capacitor. The power dissipation of the terminating resistor can be reduced to 1/5 in the conventional determination scheme, and overshoot can be reduced to 1/5 that in the open scheme. This scheme is promising for use with palm-top equipment, facilitating high-speed low power operation     

Characterization of Linear and Nonlinear Properties of GaAs MESFET's for Broad-Band Control Applications

GaAs MESFET's designed for control applications have improved switching performance compared to FET's designed for low-noise or high-power amplifiers. A broad-band switching cutoff frequency figure of merit close to 500 GHz has been achieved with both epitaxial and ion-implanted devices having n/sup +/ surface layers and/or channel dopings above 2.0 X 10/sup 17/ cm/sup -3/. Power handling nnder CW conditions is limited in the nonconducting state (FET dc biased into pinchoff) by the difference between the gate breakdown voltage and the pinchoff voltage, while conducting-state power handling is limited by the open-channel current-handling capability. For optimum switching frequency figure of merit, individual gate finger widths greater than those used in amplifier devices for the same maximum frequency of operation are necessary. The large (~5 k Omega) resistor in series with the gate has important ramifications in optimizing the power-handling capability for broad-band applications.     

On-die termination resistors with analog impedance control for standard CMOS technology

In this paper, we have designed a new voltage-controlled resistor for the purpose of on-die termination in standard CMOS technology. Current-voltage (I-V) characteristics show that this on-die termination resistor has good linearity across a wide range of gate bias, and is suitable for an analog impedance control technique using a feedback loop. The analog impedance control technique has the advantage of continuous impedance adjustment without interfering with normal data transmission and receiving operations. Experimental I-V characteristics show excellent linearity and are in good agreement with simulations. Measured resistance values are within /spl plusmn/5% over process, temperature, and across die variations.     

金属膜电阻器用高阻溅射靶材研究

利用真空熔炼的方法，研制出用于金属膜电阻器生产用的高阻溅射靶材。用该靶材可溅射制备得到薄膜电阻值达１～１０ｋΩ，电阻温度系数α在±１００×１０－６℃－１以内，脉冲稳定性在０．５％以下的电阻体。其阻值和其他电性能稳定可靠，分档集中，产品性能达到ＧＢ５８７３－８６标准，适用于金属膜电阻器生产。     

Edge injection currents and their effects on 1/f noise in planar Schottky diodes

A technique has been devised whereby the foreward bias edge current of a planar Schottky diode can be separated from the area current. The saturation current density and ideality factor of this edge current have been measured, the edge saturation current density being related to the area saturation current density by a newly defined edge figure of merit, M_e. The area current agrees very closely with the thermionic emission Schottky diode equation, whereas the edge currents exhibit serious departures from this equation. No guard rings or process steps other than those normally used to fabricate diodes are needed to obtain these measurements. An ultra-low-noise preamplifier has been constructed which is sufficiently sensitive to detect the difference between the thermal noise of a short and a 5 ohm resistor. Noise power levels approaching $\text{case1}\text{2}\text{kT}$ (pure shot noise) have been observed in unpassivated Schottky diodes. The low frequency noises (1/f noise) of planar Schottky diodes has been measured and correlated with the edge currents, the correlation being expressed in the form of a newly defined noise figure of merit, M_n. The technique and figures of merit are universally applicable to all forms of planar diode structures, including Schottky barrier and diffused junction types.     

Direct measurements of interfacial contact resistance, end contact resistance, and interfacial contact layer uniformity

A four-terminal microelectronic test structure and test method are described for electrically determining the degree of uniformity of the interfacial layer in metal-semiconductor contacts and for directly measuring the interfacial contact resistance. A two-dimensional resistor network model is used to obtain the relationship between the specific contact resistance and the measured interfacial contact resistance for contacts with a uniform interfacial layer. A new six-terminal test structure is used for the direct measurement of end contact resistance and the subsequent determination of front contact resistance. A methodology is described for reducing the effects of both contact-window mask misalignment and parasitic resistance associated with these measurements. Measurement results are given for 98.5-percent Al/1.5- percent Si and 100-percent Al contacts on n-type silicon.     

Theory of materials for thermoelectric and thermomagnetic devices

The relation between the thermoelectric figure of merit Z and the basic properties of the material such as carrier mobilities, band structure, thermal conductivity and minority carrier lifetime is discussed. For isotropic materials with parabolic bands it is shown that the figure of merit based on the Seebeck coefficient will increase when a magnetic field is applied, if acoustic-mode scattering is predominant. If optical-mode scattering is predominant, the figure of merit will increase if ZT>0.77. Materials for devices based upon the Nernst or Ettingshausen effects will have large figures of merit only if 1) (m^*)^3/2µ/κL is large, 2) the energy gap is less than kT, and 3) the electron and hole mobilities are similar. Materials requirements for Nernst- and Seebeck-type devices are compared.     

A 4.6 GHz cascade switched biasing LC–QVCO using source-body resistor

This paper presents a 4.6 GHz LC quadrature voltage-controlled oscillator (QVCO) in which the phase noise performance is improved by two methods: cascade switched biasing (CSB) technique and source-body resistor. The CSB topology can reduce the resonator loss caused by MOSFET resistance. Meanwhile, it can maintain the benefits of conventional switched biasing technique. The source-body resistors are utilized to reduce the noise contribution of the substrate related to the cross coupled MOSFETs. The proposed QVCO has been implemented in standard 0.18 μm CMOS technology. With the two methods mentioned above, it consumes 4.9 mW under 1 V voltage supply and achieves a phase noise of ?120.3 dBc/Hz at 1 MHz frequency offset from the carrier of 4.56 GHz. The figure of merit is 186.5 dBc/Hz and the tuning range is from 4.2 G to 5 GHz (17.3 %). When the QVCO operates at 0.8 V voltage supply, the power consumption is 2.88 mW and the phase noise is ?115.7 dBc/Hz at 1 MHz frequency offset from the carrier of 4.58 GHz.     

Cr-TiO2as an L-band maser material

The inverted susceptibility is used as a figure of merit to discuss the maser properties of Cr-TiO2atL-band frequencies. This material has the advantage of a high inversion ratio and narrow linewidth resulting in a gain per unit length 10 to 25 times larger than for ruby in the liquid helium temperature range. The optimum concentration of Cr³⁺is found to be around 0. 016 percent from measured data at 1.4 Gc/s. The gain calculated from the figure of merit agrees with measurements on an actual 1.4 Gc/s traveling-wave maser. The decrease in inversion ratio with increasing Cr³⁺concentration is an important factor which determines the behavior of the figure of merit. This variation is shown to be consistent with calculations based on a simplified spin-lattice relaxation model.     

一种测试半导体制冷器的瞬态方法

ZT值、最大制冷温差和响应时间是表征半导体制冷器性能的重要参数.文中介绍了一种能同时测量这三个参数的瞬态方法,并讨论了热沉对测试结果的影响.利用一个由恒流脉冲发生器和数据采集卡组成的简单测试系统测得制冷器在小电流下的电阻电压和塞贝克电压,通过这两个电压推导出ZT值、最大制冷温差.这种瞬态方法是非接触式测量,准确度高,可用于薄膜热电器件测试;另外瞬态方法耗时短,可大大缩短半导体制冷器可靠性测试的周期.采用这种方法对4mm×4mm×2.4mm的热电制冷器进行实验,环境温度300K时,测得ZT值为0.39,最大温差58.5K,响应时间20s.     

A termination scheme using intended asymmetric spatial filter response for averaging flash A/D converter

Averaging network is adopted to reduce the front-end amplifier’s offset in the flash analog-to-digital converter (ADC) commonly at the cost of the boundary threshold error. Such error worsens the integral-nonlinearity and introduces distortion. An averaging termination scheme using intended asymmetric spatial filter response is proposed to overcome this problem. It matches the impulse response window width, W _IR, to the active zero-crossing response window width, W _ZX at the boundary of network. Analysis and simulation show that by tuning the ratio between termination resistor R _T and averaging resistor R ₁, the boundary error is reduced as close as to 1%. This method provides sufficient reliability since the resistance matching can be fabricated as high as 1% in modern CMOS technology. Its feasibility for the flash ADC has been validated by a 1GS/s 4-bit flash converter.     

Monolithic distributed amplifier with active control schemes for optimum gain and group-delay flatness, bandwidth, and stability

In this paper, active control schemes are presented to optimize the performance of the distributed amplifier (DA) subject to the process variation. A detailed analysis of the DA with mismatched termination loads has been performed, which reveals that pronounced gain and group-delay ripple arises at the low-frequency end from the reflected waves in the artificial transmission line. To solve this problem, an active variable resistor is proposed as the gate-line termination load. The gain and stability of the cascode DA has also been analyzed, which identifies the most critical component determining the tradeoff between the gain-bandwidth product (GBP) and the stability to be the gate feedback resistor of common-gate field-effect transistor. It is also replaced with the active resistor to maximize GBP, while avoiding oscillations. A nine-section cascode DA with active control features is designed and fabricated using commercial GaAs pseudomorphic high electron-mobility transistor foundry. The measurement shows that the gain and group-delay ripple can be minimized, and GBP can be maximized without oscillations by the active bias controls. Active control schemes allow the monolithic DAs to be fine tuned after the fabrication and, thus, can be a robust DA design methodology against process variation and inaccurate device models.     

Effect of geometric complexities and nonlinear material properties on interfacial crack behavior in electronic devices

Interfacial failures are often found in solder joints between electronic components and PWAs, under shock and drop loading. These interfacial fractures are often either between layers of dissimilar intermetallic compounds (IMCs), or between the solder and IMC layer. Studies have revealed that these interfaces are usually scalloped (wavy and non-planar) and that the waviness decreases with continued thermal aging, accompanied by a reduction of the apparent resistance to interfacial crack initiation. This study investigates the effects of the interfacial waviness, nonlinear solder material properties, local geometric complexities, and the initial crack length, on the resistance to crack initiation. Most of the studies in this field until this point have been either simple theoretical models not including all complexities or few limited experimental work. A computational framework is generated here to comprehensively include all important parameters that can then make efficient predictions cost-effectively and provide insights on the dependency of the interfacial fracture properties on all these parameters. Accurate and efficient assessment of such fracture properties will inherently help in designing reliable electronic assemblies and prevention of premature field failures.     

Matrix Representations of Noise Figures and Noise Figure Charts in Terms of Power Wave Variables

The noise power, excess exchangeable noise figure, and excess transducer noise figure of a linear active two-port are represented by the power wave scattering transfer matrix. It follows that these noise figures are expressed as ratios of two Hermitian forms, and that their stationary values and the reflection coefficients at the input which yields them are obtained from the eigenvalues and the corresponding eigenvectors of each characteristic matrix. The excess transducer noise figure is considered here only for the case of the load being a resistor. It is proved that the transducer noise figure is equal to the exchangeable noise figure, which includes the contribution of equivalent noise at the input transformed through a two-port from the noise originating in the load. In order to evaluate graphically the change of noise figure of a two-port from its optimum value because of the reflection coefficient at the input, two kinds of noise figure charts are developed: one shows the contours of the constant noise figure normalized by the optimum value, and the other shows the contours of the constant difference between the prescribed noise figure and the optimum value. Their application to a practical problem is demonstrated. The noise figure of a linear active three-port with a passive termination /spl Zeta//sub 3/' at port 3 is expressed by a ratio of two Hermitian forms, and its stationary value and the reflection coefficient /spl Gamma/ /sub 3/ of /spl Zeta//sub 3/' which yields it are obtained. Two noise figure charts are presented by means of which the noise figure of a three-port for a specified /spl Gamma/ /sub 3/ can be evaluated.