Oxide damage from plasma charging: breakdown mechanism and oxidequality

The plasma-induced charge damage to small gate area MOS capacitors is investigated by using “antenna” structures. Here, we focus on the oxide defect characterization in a single wafer asher, and the role of oxide quality in a parallel plate etcher. The observed damage includes early breakdowns, excessive leakage current, an increase in interface states, and a decrease in charge-to-breakdown value. Moreover, annealing and polarity results support a hole trapping model for damage. In addition, it was found that the percentage of breakdown failure increases as the oxide quality decreases, In particular, the observed damage can increase up to 30 times when the initial oxide is degraded before plasma exposure according to how the oxide is prepared and annealed. This is important since it helps to explain how different process steps interact to affect the final yield. For instance a previous plasma process step may degrade an oxide and make it much more susceptible to damage by a subsequent plasma step     

Study of unipolar pulsed ramp and combined ramped/constant voltage stress on mos gate oxides

MOS gate oxide capacitors over a wide range of oxide thicknesses (10.9–28 nm) were stressed using a unipolar pulsed voltage ramp and combined ramped/constant voltage stress measurements. The reliability measurements were performed with several different bias conditions in order to assess the effects of the measurement conditions on times to breakdown and breakdown fields. In the first part it was verified that the unipolar pulsed ramp yields breakdown distributions which are identical to those of a widely used staircase ramp. In the second part the unipolar pulsed ramp was used for pre-stress prior to a constant stress and measurement results were compared to those of a ramped/constant stress with a staircase ramp. In several cases a ramp prior to a constant stress increases time to breakdown. The observations made in this study imply that the time to breakdown of a constant stress in the Fowler-Nordheim tunneling regime is strongly dependent on charge trapping and, therefore, on the stressing history of the oxide. Finally, it is shown that the combined ramped/constant voltage stress is a valuable tool for monitoring extrinsic and intrinsic breakdown properties when applying stress parameters in the correct way.     

Walk-out phenomena in 6H-SiC mesa diodes with SiO2/Si3N4 passivation and charge trapping in dry and wet oxides on N-type 6H-SiC

The drift or “walk-out” of the breakdown voltage in 6H-SiC mesa diodes passivated by a double layer of 1000 Å SiO₂ and 3000 Å Si₃N₄ was studied and related to the charge trapping in the oxide. The first-order trapping kinetics using four distinct electron traps with trapping cross-sections in the range 10⁻¹⁶ to 10⁻¹⁹ cm² were found to best describe the breakdown voltage drift curves. The wet oxide trapping cross-sections are 2 to 10 times larger compared to the dry oxide ones, resulting in about one order of magnitude faster charging of the traps. No significant differences in the amount of drift and saturation level of breakdown voltage were found between the different passivations. The influence of UV illumination, supplied by a HeCd laser with wavelength 325 nm, on the walk-out characteristics and on the reverse current was also investigated. The build-up of the surface states was observed in wet oxide under UV illumination and DC stress. The results are consistent with the coexistence of large concentrations of positive charge and acceptor type deep interface electron traps. The walk-out is a result of the acceptor states being filled by hot electrons supplied by the mechanism of avalanche injection. The suitability of the walk-out measurements as a tool for characterisation of the charge trapping properties of the passivation is demonstrated.     

Temperature and electric field characteristics of time-dependentdielectric breakdown for silicon dioxide and reoxidized-nitrided oxides

TDDB characteristics of 150 Å reoxidized nitrided oxide (ONO) gate dielectrics were examined at temperatures from 77 K to 400 K. These ONO films were processed with different conditions of rapid thermal nitridation (RTN) and rapid thermal re-oxidation (RTO). Optimized ONO films show better Q_bd performance while maintaining a similar temperature and electric field dependence compared to SiO₂. The low temperature activation energy for ONO and SiO₂ is found to be strongly temperature dependent, and the charge to breakdown, Q_bd, is closely related to the electron trap generation/trapping rate rather than the amount of hole trapping for high field stress. To further verify the effect of hole trapping on TDDB, X-ray irradiation was applied to wafers at different process steps. The results clearly show that the amount of hole trapping does not correlate with the charge to breakdown     

Impact of the trapping of anode hot holes on silicon dioxide breakdown

Hot holes are injected from the anode and trapped in thin silicon dioxide using constant voltage stress at large gate voltage. By comparing oxides having trapped holes with oxides in which the holes were detrapped, it is shown that the presence of trapped holes does not affect the breakdown of the oxide. Furthermore, as the temperature during stress is increased, less hole trapping is observed whereas the charge-to-breakdown of the oxide is decreased. The results show that although the trapping of hot holes injected using anode hole injection (AHI) may be partly responsible for defect generation in silicon dioxide, breakdown cannot be limited by the number of holes trapped in the oxide.     

Comparison between CVD and thermal oxide dielectric integrity

Low-pressure chemical vapor deposited (CVD) oxide and thermal oxide of identical thickness (360 A) are compared. CVD oxide exhibits much lower incidence of breakdown at the electric fields below 8 MV/cm, in agreement with the notion that the breakdown is largely due to the incorporation of impurities in the silicon substrate into the oxide during thermal oxidation. Furthermore, CVD oxide shows identical IV characteristics as thermal oxide and significantly lower rates of electron and hole trapping. Based on these results, CVD oxide may be an intriguing candidate for thin dielectric applications.     

Oxide thickness dependence of nitridation effects on TDDB characteristics

Wet oxide thicknesses dependence of nitridation effects on electrical characteristics, charge trapping properties and TDDB (Time Dependent Dielectric Breakdown) characteristics have been investigated. It is found that the difference of conduction current between the wet and nitrided wet oxide increases with increasing oxide thickness both for negative and positive bias to the gate until constant current stress is applied. After the stress, with decreasing oxide thickness both in wet and nitrided wet oxide leakage current increases. Up to 60 Å no difference was observed between the wet and nitrided wet oxide but at 50 Å nitrided wet oxide has less increase of current comparing to the wet oxide for the same stress. In wet oxide with increasing stress current density initial hole trap decreases but electron trap increases whereas in nitrided wet oxide has less initial hole trap and also electron trap is less comparing to the wet oxide. Both in wet and nitrided wet oxide for negative bias stress, time to 50 % breakdown decreases with decreasing thickness but at 50 Å a turn-around effect was observed due to nitridation i.e., the 50 % breakdown time is greater for nitrided wet oxide comparing to the wet oxide. On the contrary, for positive bias stress 50 % breakdown time increases with decreasing oxide thickness both in wet and nitrided wet oxide. For positive bias also a turn-around effect is observed at 50 Å i.e., 50% breakdown time is less in nitrided wet oxide comparing to the wet oxide. The improved reliability of nitrided wet oxide at the thin region of 50 Å seems to be due to the increase of more Si---N bond to the interface of oxide and Si comparing to the thick oxide of above 60 Å for the same nitridation conditions.     

The nature of charge trapping responsible for thin-oxide breakdown under a dynamic field stress

The trapping of positive and negative charges in silicon dioxide was studied as a function of injection current density and pulse width during dynamic high-field/high-current stress. Trapping of negative charges in oxide under dynamic stress conditions was found to give an accumulated charge to breakdown (Qbd) that was independent of stressing current density if the total injected charge per pulse was kept constant. However, the trapping of positive charges increased significantly as current density was increased. Under dynamic stress with fixed current density, the trapping of negative charge in the oxide increased with increasing pulse width while the trapping of positive charge was independent of pulse width. The experimental data for dynamically stressed devices suggest a strong correlation between the breakdown of thin oxides and the amount of negative charge trapped in them.     

Hole trapping and trap generation in the gate silicon dioxide

Oxide breakdown has been proposed to be a limiting factor for future generation CMOS. The breakdown is caused by defect generation in the oxide. Although electron trap generation has received much attention, there is little information available on the hole trap generation. The relatively high potential barrier for holes at the oxide/Si interface makes it difficult to achieve a high level of hole injection. Most previous work was limited to an injection level Q_inj of 10¹⁴ cm^-2. In this paper, we investigate the hole trapping and trap generation when Q_inj reaches the order of 10¹⁸ cm^-2. When Q_inj <10¹⁵ cm^-2, the trapping is dominated by the as-grown traps. As Q_inj increases further, however, it is found that the generation of new traps controls the trapping. The trap generation does not saturate up to the oxide breakdown. The trapping kinetics for both the as-grown and the generated traps is studied. The relationship between the density of generated traps and the Q_inj is explored. Attention is paid to how the trapping and trap generation depends on the distance from the interface. In contrast to the uniform generation of electron traps across the oxide, we found that the hole trap generation was not uniform and it moved away from the interface as Q_inj increased     

Hole trapping and breakdown in thin SiO2

The field dependence of the hole generation rate, also known as the impact ionization coefficient α, in thin SiO2(< 20 nm) was characterized by measuring the negative flat-band shift due to hole trapping. In thicker oxides,alpha = alpha_{0}e^{-H/E}where H = 78 MV/cm for electric fields ranging from 7 to 14 MV/cm, which covers the field range from the onset of significant Fowler-Nordheim current to instant breakdown. The similar field dependences of α and charge-to-breakdown supports the model that hole generation and trapping leads to oxide wearout. Because of the fact that positive charge generation is observed for oxide voltage well below the SiO2bandgap, we propose that the generated holes arise from transition between band tails in the amorphous SiO2. It is also observed that α decreases rapidly when the applied oxide voltage is very low; thus α is a function of both oxide field and voltage in general. This suggests that ultra-thin oxide with low operating voltages might be a good candidate for high endurance E²PROM devices at very low oxide field.     

Low electric field breakdown of thin SiO2 films understatic and dynamic stress

A comprehensive study of Time-Dependent Dielectric Breakdown (TDDB) of 6.5-, 9-, 15-, and 22-nm SiO₂ films under dc and pulsed bias has been conducted over a wide range of electric fields and temperatures. Very high temperatures were used at the wafer level to accelerate breakdown so tests could be conducted at electric fields as low as 4.5 MV/cm. New observations are reported for TDDB that suggest a consistent electric field and temperature dependence for intrinsic breakdown and a changing breakdown mechanism as a function of electric field. The results show that the logarithm of the median-test-time-to failure, log (t₅₀), is described by a linear electric field dependence with a field acceleration parameter that is not dependent on temperature. It has a value of approximately 1 decade/MV/cm for the range of oxide thicknesses studied and shows a slight decreasing trend with decreasing oxide thickness. The thermal activation E_a ranged between 0.7 and 0.95 eV for electric fields below 9.0 MV/cm for all oxide thicknesses. TDDB tests conducted under pulsed bias indicate that increased dielectric lifetime is observed under unipolar and bipolar pulsed stress conditions, but diminishes as the stress electric field and oxide thickness are reduced. This observation provides new evidence that low electric field aging and breakdown is not dominated by charge generation and trapping     

衬底热空穴导致的薄栅介质经时击穿的物理模型研究

该文定量研究了热电子和空穴注入对薄栅氧化层击穿的影响,讨论了不同应力条件下的阈值电压变化,首次提出了薄栅氧化层的经时击穿是由热电子和空穴共同作用的结果,并对上述实验现象进行了详细的理论分析,提出了薄栅氧化层经时击穿分两步。首先注入的热电子在薄栅氧化层中产生陷阱中心,然后空穴陷入陷阱导致薄栅氧击穿。     

Plasma damage immunity of thin gate oxide grown on very lightly N+ implanted silicon

Plasma damage immunity of gate oxide grown on very low dose (2×10¹³/cm²) N⁺ implanted silicon is found to be improved compared to a regular gate oxide of similar thickness. Both hole trapping and electron trapping are suppressed by the incorporation of nitrogen into the gate oxide. Hole trapping behavior was determined from the relationship between initial electron trapping slope (IETS) and threshold voltage shifts due to current stress. This method is believed to be far more reliable than the typical method of initial gate voltage lowering during current stress     

Hole trapping, substrate currents, and breakdown in thin silicondioxide films [ in FETs ]

Using oxide-trapped-charge sensing techniques on FET's after high-field Fowler-Nordheim-stress, anode hole injection is shown to be important only for gate voltages larger than ≈7.6 V for either p- or n-channel devices with n+ poly-Si gates independent of oxide thickness. These results do not support popular models for thin oxide degradation and “intrinsic” breakdown based on hole trapping in the oxide layer at lower voltages     

Field and temperature acceleration of time-dependent dielectricbreakdown for reoxidized-nitrided and fluorinated oxides

The effects of injection current density and temperature on time-dependent dielectric breakdown (TDDB) of low-pressure thermally reoxidized-nitrided oxides (RNOs) and fluorinated oxides (FOs) with equivalent oxide thicknesses of 100 Å were examined. Time to breakdown for RNO was found to be improved over that for thermal oxide while both the impact ionization coefficient and the activation energy of lifetime are comparable to those of control oxide. On the other hand, no obvious TDDB improvement was observed for FO. This observation, in conjunction with the results for charge trapping measurements at different temperatures, indicates that the lifetime improvement for RNOs might be due to the reduced charge traps in these films. I-V ramp tests have shown that RNO has a comparable density to that of control oxide     

Hole trapping during low gate bias, high drain bias hot-carrierinjection in n-MOSFETs at 77 K

Injection and trapping of holes in the gate oxide of n-channel MOS transistors during operation at large drain and small gate biases are investigated at liquid-nitrogen temperature. Experimental evidence is given that about three times less trapping of holes occurs in the gate oxide at 77 K as compared to 295 K. The authors show that this is due to the small hole mobility in SiO₂ at low temperature     

Low-pressure chemical-vapor-deposited silicon-rich oxides fornonvolatile memory applications

The electrical and reliability characteristics of ultrathin nonstoichiometric silicon oxide (SiO_x, x<2) films deposited by the low-pressure chemical vapor deposition (LPCVD) technique using silane and nitrous oxide were studied. It has been found that these oxides exhibit enhanced current conduction at low electric field for both voltage polarities due to reduced conduction barrier height and a conduction mechanism that involves direct tunneling between dispersed silicon crystallites in the oxide. The current characteristics are controlled by adjusting the SiH₄/N₂O gas ratio. These nonstoichiometric films exhibit lower charge trapping, have an extremely large charge to breakdown, and there is negligible interface state generation in comparison to ultrathin thermal oxides. The results indicate that these highly reliable dielectrics can be promising candidates for nonvolatile memory applications     

Time-dependent dielectric breakdown of ultra-thin silicon oxide

To evaluate the reliability of thin thermally grown oxide films, we examined their intrinsic breakdown characteristics and investigated oxide defects in them using ultra-thin oxides (3-10 nm). It is demonstrated that the breakdown time of oxide films becomes longer as the film thickness is decreased. Through the use of an electron trap generation model, we were able to explain this phenomenon and estimate the breakdown time under low electric field or low current conditions. Furthermore, we were able to determine that, with decreasing film thickness, the defect density of the initial short mode increases, while that of the weak-spot mode decreases.     

Breakdown walkout in planar p-n junctions

Junction breakdown walkout in p-n junctions has been investigated in this paper. It has been shown that walkout is closely related to the avalanching in the junction. During the time the junction is subjected to the reverse breakdown, because of avalanching, hot electrons are generated in the depletion region. Some of the hot electrons have enough energy to cross the oxide-silicon barrier and to go into the conduction band of the oxide. The electrons are trapped in the traps and charge the oxide negatively, resulting in reduction of electric field intensity in the surface depletion region of the p-n junction. This results in an increase of the breakdown voltage. A theory has been developed to explain hot electron injection and trapping in the oxide and its effect on the breakdown voltage. A comparison of results predicted by theory, with the experiments has also been carried out.     

Oxide-Trapped Charges Induced by Electrostatic Discharge Impulse Stress

The characteristics of oxide-trapped charges Q_ot induced by electrostatic discharge high-field current impulse stress, i.e., transmission line pulsing (TLP), were studied. It was observed that for a 3.2-nm-thin oxide, the centroid evolution and the critical density of positive oxide-trapped charges Q_ot ⁺ to trigger oxide breakdown are about the same between dc and TLP impulse stresses. These results are consistent with the existing models of stress-induced trapping charges and hole-induced oxide breakdown. However, different behaviors of Q_ot and centroid were found for 14-nm-thick oxides subjected to different stress tests. TLP impulse stress generates far less amount of negative oxide- trapped charges Q_ot ^- than dc stress, and the positive oxide-trapped charges finally dominate over the negative oxide-trapped charges. This impulse stress imposes a high density and transient current on the oxide, which induces traps at the tunneling distance locally. The hotter injected electrons generate more efficient hole trappings to provoke breakdown with lower density of oxide-trapped charges in comparison with dc stress test.