用VISUAL FOXPRO设计多媒体播放器

本文介绍了利用ＶＩＳＵＡＬＦＯＸＰＲＯ的应用程序接口ＦＯＸＴＯＯＬＳ调用ＷＩＮＤＯＷＳ的ＤＬＬ库开发多媒体播放器的原理及实现技术，利用该播放器可以对波形文件（．ＷＡＶ），数字音乐，（．ＭＩＤ），视频图象（．ＡＶＩ）动画（．ＦＬＡ）音频，压缩视频（．ＭＰＧ）Ｖ－ＣＤ视频，（．ＤＡＴ）等进行控制和播放。     

基于VHDL高级综合的条码阅读预处理器的FPGA设计

文中定义了条码阅读处理器的功能，给出其ＶＨＤＬ语言的行为源描述，讨论了在ＶＨＤＬ高级综合系统ＨＬＳ／ＢＩＴ的支持下面向ＦＰＧＡ，从算法级行为描述开始，自顶向下地进行条码阅读预处理器的设计过程，从中可见，ＶＨＤＬ高级综合和ＦＰＧＡ的结合，是一种简化设计复杂度，提高设计时效的ＡＳＩＣ的简便方法。     

自动FFT处理器设计

当前ＦＦＴ（ＦａｓｔＦｏｕｒｉｅｒＴｒａｎｓｆｏｒｍｓ）可以利用ＤＳＰｓ或微处理器以软件方式实现，也可用专用器件及通用的ＶＬＳＩ来获得高效能的ＦＦＴ。对于后者，主要的问题是资金开销、设计风险以及设计时间。本文介绍了用可编程逻辑器件自动实现ＦＦＴ处理器的设计工具，并介绍其设计方法与应用。     

在专用网上实现的中西文兼容Videotex终端的设计

在专用网上实现的中西文兼容Ｖｉｄｅｏｔｅｘ终端的设计任伟利（西安交通大学信息与控制工程系西安７１００４９）ＤＥＳＩＧＮＯＦＣＯＭＰＡＴＩＢＬＥＣＨＩＮＥＳＥ－ＥＮＧＬＩＳＨＶＩＤＥＯＴＥＸＴＥＲＭＩＮＡＬＢＡＳＥＤＯＮＳＰＥＣＩＡＬ－ＰＵＲＰＯＳＥＮ...     

运用PETRI网络理论设计DSP系统的监控程序

介绍了在设计一种用ＤＣＰ为基础的仪器时,采用ＰＥＴＲＩ网络理论取代ＩＦ－ＥＬＳＥ结构形式设计ＤＳＰ系统的监控程序。该方法算法程序简单,不仅大大节省了监控程序所占用的内存．而且效果好。     

生物大分子图形软件的研制

我们设计了生物大分子图形显示软件（ＢＩＯＭＯＬ）．程序用ＦＯＲＴＲＡＮ７７语言编写，分为在ＶＡＸ计算机和ＳＧＩ图形工作站上运行的两个版本，该系统具有结构显示、几何操作、部分结构显示以及多模型显示等功能．     

基于方块脉冲函数逼近的线性连续回归模型的参数估计及其应用

基于方块脉冲函数逼近的线性连续回归模型的参数估计及其应用赵明旺（武汉钢铁学院）ＰＡＲＡＭＥＴＥＲＥＳＴＩＭＡＴＩＯＮＦＯＲＬＩＮＥＡＲＣＯＮＴＩＮＵＯＵＳＲＥＧＲＥＳＳＩＶＥＳＹＳＴＥＭＳＶＩＡＢＬＯＣＫＰＵＬＳＥＦＵＮＣＴＩＯＮＳＡＮＤＩＴＳＡＰＰ...     

VHDL高级综合系统设计中某些关键问题的技术决策

本文的研究实现了从电路系统行为（含算法及功能）的ＶＨＤＬ描述到ＲＴＬ和逻辑结构级描述的高级综合，并针对ＸｉｌｉｎｘＦＰＧＡ文件库映射成工艺相关的ＡＳＩＣ，直至生成ＦＰＧＡ的器件，整个系统包括七个部分，本文重点讨论每个部分技术决策以及在ＳＵＮＳＰＡＲＣ２个实现的运行结果。     

Visual Foxpro多媒体信息管理程序设计

本文介绍利用ＭＳＯＬＥ２．０技术将Ｖｉｓｕａｌ Ｂａｓｉｃ４．０中ＭＣＩ控件移植到Ｖｉｓｕａｌ Ｆｏｘｐｒｏ系统中的方法和步骤，实现了使用Ｖｉｓｕａｌ Ｆｏｘｐｒｏ开发多媒体信息管理程序。     

大众FA11主板推介

台湾大众电脑（ＦＩＣ）是著名的主板生产厂商之一,我想一些经常攒机的老鸟们一定不会陌生,最近该公司推出了基于ＶＩＡ Ａｐｏｌｌｏ Ｐｒｏ １３３Ａ ＶＩＡ芯片组,支持ＩＮＴＥＬ和 ＣＹＲＩＸ ＪＯＳＨＵＡ、 ＣＹＲＩＸＳＡＭＵＥＬ处理器的ＦＡ１１和ＦＡ３１主板。 大众ＦＡ１１主板采用ＶＩＡ ６９４Ｘ北桥和５９６Ｂ南桥芯片,ＡＴＸ结构。主板上面提供了三条ＤＩＭＭ插槽,最多支持达１．５ＧＢ的ＳＤＲＡＭ,当然也支持ＶＩＡ倡导的ＰＣ１３３标准。一条ＡＧＰ２Ｘ／４Ｘ插槽,五条ＰＣＩ以及一条ＩＳＡ插槽,提供了良好的全…     

VLSI数据库系统的物理设计和实现技术

在VLSI芯片的设计过程中,所牵涉到的设计数据的数量是巨大的,数据库管理系统则起着十分重要和不可替代的作用。本文依据VLSI设计过程的特点和要求以及设计数据的类型与特征,研讨适用于VLSI CAD系统中的数据库管理系统的物理设计和实现问题,同时给出一个实际设计的VLSI数据库系统的数据模型和组织方式以及物理结构。     

A knowledge-based expert system for automatic visual VLSI reverse-engineering: VLSI layout version

This paper presents a method of knowledge representation for very large scale integration (VLSI) chip design which provides the necessary information for abstraction from the physical design to gate-level logic through a high-level behavioral model. The representation scheme used by the ANTISTROFEAS system utilizes a hierarchical attributed graph structure which consists of incrementally abstracted design information for the VLSI system. This method of knowledge representation is well-suited to reverse-engineering of VLSI chips from the layer mask layout data, but is also applicable to applications at many levels of the design process including design rule checking, logic synthesis, design verification, and partitioning-compaction problems. The representation scheme is applicable to any VLSI technology, and is designed to take advantage of artificial intelligence. expert system techniques, by disassociating the representation and manipulation of the VLSI design data from the rules which govern its correctness and transformation for other usage.     

MIND: An inside Look at an Expert System for Electronic Diagnosis

Because of its intended purpose, it is very complicated to diagnose faults in VLSI test system hardware. When this problem is considered in the hardware design phase, it is apparent that VLSI test systems need to have built-in self-test features. For a self-test to be of any value, the circuit check program should minimize the hardware involved in each test. MIND is an expert system for VLSI test system diagnosis that integrates the principles of their hierarchical design and experts' heuristics to achieve a practical approach to reducing test system downtime.     

Design for packageability-early consideration of packaging from aVLSI designer's viewpoint

Designing VLSI dies without considering packaging issues may result in a suboptimum system. It is argued that before the design of VLSI dies is completed, packaging issues should be evaluated, since they may affect choices in VLSI circuit design and layout. To illustrate this, the design of an image processing chip-set of three integrated circuits for wire-bond printed circuit board (PCB) and flip-chip multichip module deposited (MCM-D) technologies is reviewed. It is shown that the characteristics of these chips vary, since they are designed with different packaging in mind     

基于数据与控制分割方法的异步串行接口设计

根据VLSI系统设计的流程，很自然的将VLSI模块分成数据路径和控制通道两个部分，在它们之间进行数据处理的联系和格式信息的反馈，控制部分一般用状态机实现，本文根据异步串行通讯的RS232标准，利用数据与控制分割思想，实现了异步串行通讯接口的发送和接收模块SCI的VLSI设计。     

An expert system to automate timing design

Presents a novel approach for automating the timing design of interfaces between VLSI chips in microcomputer systems. The Prolog-based expert system, called TDS (for timing design system), incorporates the heuristic knowledge of the hardware designer. TDS is a rule-based system that interprets the specification sheets of VLSI chips and can synthesize, diagnose, and verify timing charts at the expert's level. The system uses a functional model based on timing specifications, not the structural information. TDS can model other interfaces that are based on timing specifications, such as standard bus interfaces     

A lower cost graphics system for VLSI design,design rule checking and pattern generation

Increasing interest by traditional systems houses in the design of custom and semi-custom integrated circuits (LSI and VLSI) provided the impetus for the development of a lower cost interactive graphics systems (IGS) for VLSI design, design verification, and the efficient generation of optical pattern generation and electron beam control files.While extremely attractive, but expensive, IGS units are available from such manufactures as Applicon and Calma for use in very large design groups, it was felt that a lower cost system incorporating the latest in design aids was needed for smaller or geographically dispersed design operations. This paper describes the implementation of one such system, and examines the various implementation options which must be examined by any group which might wish to build or acquire such a capability.     

Color-mapping techniques for computer-aided design and verification of VLSI systems

Color raster-scan displays are often equipped with hardware for color transformation. Because the transformation can be redefined much more quickly than a full image can be computed (in a host) and subsequently displayed, it is preferable when possible to perform image operations by simply changing the mapping. Here an interactive layout system for NMOS VLSI is described which gives immediate feedback in color. Viewing modes are emphasized; opaque and translucent modes are discussed which allow the flexibility required for efficient understanding of the design by the designer. The color table is also used to help the designer detect violations of design rules; design rule violations can be readily detected when the transformation unit is used to highlight overlaps of selected VLSI layers or fringe structures derived from them. These color-mapping methods for man-machine interaction promise to enhance the productivity of the designer considerably, and they point the way to VLSI design systems of the future.     

An efficient dictionary machine using hexagonal processor arrays

Dictionary machine is an important VLSI system performing high speed data archival operations. In this paper, we present a design which can efficiently implement dictionary machines in VLSI processor arrays. In order to effectively process the operations of dictionary machine, hexagonal mesh is selected as the host topology in which two different networks for update and query operation are embedded. The proposed design is simple to implement as well as allows high throughput     

基于CDFG工具包的VLSI高层设计中调度的实现

VLSI设计分成不同的设计层次，VLSI高层次设计技术是系统设计研究的主要方向，高层次综合设计是高层次设计技术中的关键，在高层次综合设计中的主要任务是调度。本文介绍了若干基本的调度算法及CDFG工具包的构成，并将CDFG工具包用于调度算法的实现，其优点在于算法设计和结果分析更加简便直观。