Zero-voltage and zero-current-switching PWM hybrid full-bridge three-level converter

This paper proposes a zero-voltage and zero-current-switching pulsewidth modulation hybrid full-bridge three-level (ZVZCS PWM H-FB TL) converter, which has a TL leg and a two-level leg. The voltage stress of the switches of the TL leg is half of the input voltage, and the switches can realize ZVS, so MOSFETs can be adopted; the voltage stress of the switches of the two-level leg is the input voltage, and the switches can realize ZCS, so IGBT can be adopted. The secondary rectified voltage is a TL waveform having lower high-frequency content compared with that of the traditional FB converters, which leads to the reduction of the output filter inductance. The input current of the converter has quite little ripple, so the input filter can also be significantly reduced. The operation principle of the proposed converter is analyzed and verified by the experimental results. Several ZVZCS PWM H-FB TL converters are also proposed in this paper.     

Zero-Voltage-Switching PWM Hybrid Full-Bridge Three-Level Converter With Secondary-Voltage Clamping Scheme

A hybrid full-bridge (H-FB) three-level (TL) converter can realize zero-voltage-switching for switches with the use of resonant inductance (including the leakage inductance of the transformer) and intrinsic capacitors of the switches. As it can operate in three-level and two-level (2L) modes, the secondary rectified voltage is always close to the output voltage over the input-voltage range; thus, the output filter requirement is significantly less. Meanwhile, the voltage stress of the rectifier diodes can also be reduced. Therefore, the H-FB TL converter is very attractive for wide input-voltage-range applications. However, there is a serious voltage oscillation across the rectifier diodes caused by reverse recovery like the Buck-derived converters. In this paper, two clamping diodes are introduced to the H-FB TL converter to eliminate the voltage oscillation across the rectifier diodes. The arrangement of the positions of the resonant inductance and the transformer is discussed. The operation principle of the proposed converter is analyzed in details. A 1.2-kW prototype was built and tested in the laboratory to verify the operation of the proposed converter.     

一种原边带箝位二极管的ZVS移相全桥变换器

移相全桥零电压变换器是中大功率直直变换场合的理想拓扑之一,但在其输出整流二极管反向恢复时,整流桥产生寄生振荡,二极管上存在很高的尖峰电压。这将带来电路损耗,并影响整流桥的使用寿命。本文介绍了一种原边带箝位二极管的电路形式,它能够很好地抑制寄生振荡,消除尖峰电压,分析了其工作原理,制作了一个5.5kW样机,并给出了加二极管前后的对比实验结果。     

Zero-voltage-switching half-bridge DC-DC converter with modified PWM control method

Asymmetric control scheme is an approach to achieve zero-voltage switching (ZVS) for half-bridge isolated dc-dc converters. However, it is not suited for wide range of input voltage due to the uneven voltage and current components stresses. This paper presents a novel "duty-cycle-shifted pulse-width modulated" (DCS PWM) control scheme for half-bridge isolated dc-dc converters to achieve ZVS operation for one of the two switches without causing the asymmetric penalties in the asymmetric control and without adding additional components. Based on the DCS PWM control scheme, an active-clamp branch comprising an auxiliary switch and a diode is added across the isolation transformer primary winding in the half-bridge converter to achieve ZVS for the other main switch by utilizing energy stored in the transformer leakage inductance. Moreover, the auxiliary switch also operates at ZVS and zero-current switching (ZCS) conditions. Furthermore, during the off-time period, the ringing resulted from the oscillation between the transformer leakage inductance and the junction capacitance of two switches is eliminated owing to the active-clamp branch and DCS PWM control scheme. Hence, switching losses and leakage-inductance-related losses are significantly reduced, which provides the converter with the potential to operate at higher efficiencies and higher switching frequencies. The principle of operation and key features of the proposed DCS PWM control scheme and two ZVS half-bridge topologies are illustrated and experimentally verified.     

A novel ZVS DC/DC converter for high power applications

This paper presents a novel zero voltage switch (ZVS) pulse-width modulation (PWM) DC/DC converter for high power, high output voltage applications. By using two active switches in the secondary side of a transformer, the proposed converter achieves not only ZVS of the active switches in the entire load ranges but also soft commutation of the output rectifier diodes. The proposed topology has simple structure and control strategy. Simulation results and experimental results of a 2.8 kW 200 kHz DC/DC converter are presented.     

Zero-voltage-switching PWM three-level converter with current-doubler-rectifier

This paper proposes a zero-voltage-switching (ZVS) pulse-width modulation three-level converter with current-doubler-rectifier, which achieves ZVS for all the switches under wide load range and in a wide line range. The rectifier diodes commutate naturally, therefore no oscillation occurs. The determination of the output filter inductance and the blocking capacitor is discussed in details. The experimental results are presented to verify the operation principle of the proposed converter.     

Soft-switching PWM three-level converters

This paper proposes a family of modulation strategies for PWM three-level (TL) converters. The modulation strategies can be classified into two kinds according to the turn-off sequence of the two switches of the pair of switches. The concept of the leading switches and the lagging switches is introduced to realize soft-switching for PWM TL converters. The realization of soft-switching for both the leading switches and the lagging switches is proposed, based on which, soft-switching PWM TL converters can be classified into two kinds: zero-voltage-switching (ZVS) and zero-voltage and zero-current-switching (ZVZCS), for which the suitable modulation strategies are pointed out respectively from the family of modulation strategies. A novel ZVZCS TL converter is proposed, its operation principle and parameter design are analyzed, and the experimental results are also included     

移相全桥ZVS变换器的分析和设计

移相全桥零电压开关变换器是中大功率直直变换场合的理想拓扑之一,但其次级整流二极管反向恢复时,产生严重的寄生振荡,二极管上存在很高的尖峰电压。而文献1中的变换器通过增加一个谐振电感和两个二极管,不仅可以实现软开关,还可以消除次级整流二极管反向恢复引起的电压振荡。基于此变换器的工作原理,文中设计了一台500W移相控制零电压软开关电源,给出了主电路的设计过程和实验波形。     

一种新型的零电压零电流三电平变换器的研究

针对采用IGBT的软开关三电平变换器中IGBT关断过程存在的电流拖尾现象,以及基本三电平拓扑变压器次级存在的电压过冲和电压振荡现象,提出了改进型ZVZCS三电平结构。该结构在基于拓扑的三电平桥臂侧和两电平桥臂侧分别加入了一个无源辅助网络,三电平桥臂侧的辅助变压器在续流阶段为主变压器初级电流回零提供了条件,两电平桥臂的谐振电感和箍位二极管有效地抑制了主变压器次级电压的过冲现象。详细分析了改进拓扑的工作原理、工作模态,以及辅助网络的工作特点,并研制了实验样机,验证了理论分析的正确性以及改进拓扑的可行性。     

Improved voltage clamping scheme for ZVS PWM three-level converter

This paper proposes an improved zero-voltage-switching pulsewidth-modulation (ZVS PWM) three-level converter, which is improved from the original ZVS PWM three-level converter by merely exchanging the position of the resonant inductance and the transformer, such that the transformer is connected with the lagging switches. The improved converter has several advantages over the original, e.g., the clamping diodes conduct only once in a switching period, and the resonant inductance current is smaller in zero state, leading to a higher efficiency and reduced duty-cycle loss. A blocking capacitor is usually introduced to the primary side to prevent the transformer from saturating. This paper analyzes the effects of the blocking capacitor in different positions, and a best scheme is determined. A 2.5-kW prototype converter verifies the effectiveness of the improved converter and the best scheme for the blocking capacitor.     

Interleaved ZVS Converter With Ripple-Current Cancellation

In this paper, an interleaved soft-switching converter with ripple-current cancellation is presented to achieve zero- voltage-switching (ZVS) turn-on and load current sharing. In order to achieve ZVS turn-on, an active snubber is connected in parallel with the primary winding of the transformer. The energy stored in the transformer leakage inductance and magnetizing inductance can be recovered so that the peak voltage stress of switching devices is limited. The resonance at the transition interval is used to realize ZVS turn-on of all switches. In order to achieve three-level pulsewidth-modulation (PWM) scheme, an addition fast-recovery diode is used in the converter. Three-level PWM scheme can reduce the ac ripple current on the output inductor such that the output inductor can be reduced. The current-doubler rectifier is adopted in the secondary side of the transformer to reduce the transformer secondary-winding current and output voltage ripple by canceling the current ripple of two output inductors. The output voltage is controlled at the desired value using the interleaved PWM scheme. These features make the proposed converter suitable for the dc-dc converter with high output current. The operation principles, steady state analysis, and design equations of the proposed converter are provided in detail. Finally, experiments based on a 600-W (12 V/50 A) prototype are provided to verify the effectiveness and feasibility of the proposed converter.     

Novel zero-voltage-transition current-fed full-bridge PWM converterfor single-stage power factor correction

A novel zero-voltage-transition (ZVT) current-fed full-bridge pulsewidth modulation (PWM) power converter for single-stage power factor correction (PFC) is presented to improve the performance of the previously presented ZVT converter. A simple auxiliary circuit which includes only one active switch provides a zero-voltage-switching (ZVS) condition to all semiconductor devices (two active switches are required for the previous ZVT converter). This leads to reduced cost and a simplified control circuit compared to the previous ZVT converter. The ZVS is achieved for wide line and load ranges with minimum device voltage and current stresses. Operation principle, control strategy and features of the proposed power converter are presented and verified by the experimental results from a 1.5 kW 100 kHz laboratory prototype     

Zero-voltage-switching PWM hybrid full-bridge three-level converter

This paper proposes a zero-voltage-switching (ZVS) pulse-width modulation (PWM) hybrid full-bridge three-level converter, which has a three-level leg and a two-level leg. The switches of the three-level leg sustain only the half of the input voltage, and they can realize ZVS in a wide load range. The switches of the two-level leg sustain the input voltage, and they can realize ZVS with the use of the resonant inductance. The secondary rectified voltage is a three-level waveform having lower high-frequency content compared with that of the traditional full-bridge converters, which can reduce the output filter, and as a result, the dynamic response of the converter is improved. The voltage stress of the rectifier diode is reduced also. The input current of the converter has quite little ripple, so the input filter can also be significantly reduced. The operation principle of the proposed converter is analyzed and verified by the experimental results.     

A Zero-Voltage and Zero-Current Switching Three-Level DC–DC Converter With Reduced Rectifier Voltage Stress and Soft-Switching-Oriented Optimized Design

A novel zero-voltage zero-current switching (ZVZCS) three-level converter with pulsewidth modulation (PWM) phase-shift control is proposed. The ZCS of the lagging switch is obtained by using a regenerative passive snubber in the secondary. In order to reduce the voltage stress on the rectifier's diodes, a few passive elements are inserted into the primary: a small inductance, two diodes, and a small additional winding of the main transformer. In each half-cycle, one of these diodes will conduct for a short time in order to clamp the voltage of the snubber's capacitor, and thus, the rectifier stress, at$(n_2/n_1)(V_ in/2)$,$n_1$, and$n_2$being the transformer's primary and, respectively, secondary turns number. The three-level configuration allows for the reduction of the voltage stress across the power switches to half of the input voltage$V_ in$. The conditions for assuring ZVS of the leading switch and ZCS of the lagging switch are found. Design constraints on the parallel capacitances of the switches of the leading switch, on the snubber's holding capacitor, and on the additional inductance and winding are hence established, allowing for an optimized design of the converter parameters. A dc analysis allows for the calculation of the effective duty cycle, which enjoys a boost effect due to the proposed snubber. Thus, a further reduction of the primary current stress and rectifier voltage stress is obtained. All the improvements conclude in a high efficiency. The influence of the choice of the parameters' values on the regulation capability is pointed out. Experiments on a prototype of 4.5kW confirm the results.     

Analysis, Design, and Implementation of a Parallel ZVS Converter

A soft-switching converter is presented in this paper to achieve a zero-voltage-switching (ZVS) turn on for all switches. Two half-bridge converters with asymmetric pulsewidth-modulation scheme are connected in parallel to control the output voltage at the desired value and achieve load-current sharing. Based on the output capacitance of power switches and the resonant inductance, including the external inductance and the transformer leakage inductance, the resonance can be achieved at the transition interval of power switches. Therefore, the ZVS turn on of power switches can be realized. The peak voltage of the power switches is limited to input dc voltage. The center-tapped rectifier is adopted at the transformer secondary side to achieve a full-wave rectification. Operation principles, steady-state analysis, and design equations of the proposed converter are discussed in detail. Finally, experimental results based on a 240-W prototype are provided to verify the performance and the feasibility of the proposed converter.     

A New PWM-Controlled Quasi-Resonant Converter for a High Efficiency PDP Sustaining Power Module

A new pulsewidth modulation (PWM)-controlled quasi-resonant converter for a high-efficiency plasma display panel (PDP) sustaining power module is proposed in this paper. The load regulation of the proposed converter can be achieved by controlling the ripple of the resonant voltage across the primary resonant capacitor with a bidirectional auxiliary circuit, while the main switches are operating at a fixed duty ratio and fixed switching frequency. Hence, the waveforms of the currents can be expected to be optimized from the view-point of conduction loss. Furthermore, the proposed converter has good zero-voltage switching (ZVS) capability, simple control circuits, no hign-voltage ringing problem of rectifier diodes, no dc offset of the magnetizing current and low-voltage stresses of power switches. Thus, the proposed converter shows higher efficiency than that of a half-bridge LLC resonant converter under light load condition. Although it shows the lower efficiency at heavy load, because of the increased power loss in auxiliary circuit, it still shows the high efficiency around 94%. In this paper, operational principles, features of the proposed converter, and analysis and design considerations are presented. Experimental results demonstrate that the output voltage can be controlled well by the auxiliary circuit using the PWM method.      

A 1-MHz Zero-Voltage-Switching Asymmetrical Half-Bridge DC/DC Converter: Analysis and Design

The asymmetrical half-bridge (AHB) topology discussed in this paper is one of the complementary driven pulse-width modulated converter topologies, which presents an inherent zero-voltage switching (ZVS) capability. In the previous work, the ideal operation of the converter and the ZVS realization process have been analyzed. However, the influence of the circuit parasitics on the output voltage drop and the design constraints of the circuit parameters to ensure the ZVS operation have not been investigated. The minimum load needed to ensure the ZVS operation is also not readily available. This paper presents a detailed and practical design for a 1-MHz AHB converter. A revised voltage transfer ratio of the converter is derived considering the influence of circuit parasitics and the ZVS transition. Two circuit parameters responsible for maintaining the ZVS operation are the transformer leakage inductance and the interlock delay time between the gate signals of two switches. A design method of the two parameters is proposed, which can ensure the ZVS transition. The possible ZVS range of the load variation is also investigated. A 50-W AHB converter with 1-MHz switching frequency was constructed, and a maximum efficiency of 91% was achieved.     

Integrated ZVS DC–DC converter with continuous input current and high voltage gain

An integrated zero-voltage-switching (ZVS) DC–DC converter with continuous input current and high voltage gain is proposed. The proposed converter can operate with soft switching, a continuous inductor current and fixed switching frequency. The voltage stress of the power switches is relatively low compared to the output voltage. Moreover, soft-switching characteristic of the proposed converter reduces switching loss of active power switches and raise the conversion efficiency. The reverse-recovery problem of output rectifiers is also alleviated by controlling the current changing rates of diodes with the use of the leakage inductance of a coupled inductor. The operation and performance of the proposed DC–DC converter were verified on an 115?W experimental prototype operating at 100?kHz.     

A new active clamping zero-voltage switching PWM current-fed half-bridge converter

A new active clamping zero-voltage switching (ZVS) pulse-width modulation (PWM) current-fed half-bridge converter (CFHB) is proposed in this paper. Its active clamping snubber (ACS) can not only absorb the voltage surge across the turned-off switch, but also achieve the ZVS of all power switches. Moreover, it can be applied to all current-fed power conversion topologies and its operation as well as structure is very simple. Since auxiliary switches in the snubber circuit are switched in a complementary way to main switches, an additional PWM IC is not necessary. In addition, it does not need any clamp winding and auxiliary circuit besides additional two power switches and one capacitor while the conventional current-fed half bridge converter has to be equipped with two clamp windings, two ZVS circuits, and two snubbers. Therefore, it can ensure the higher operating frequency, smaller-sized reactive components, lower cost of production, easier implementation, and higher efficiency. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 200-W, 24-200Vdc prototype are presented.     

An Alternative Energy Recovery Clamp Circuit for Full-Bridge PWM Converters With Wide Ranges of Input Voltage

A full-bridge dc--dc converter employing a diode rectifier in the output experiences a severe voltage overshoot and oscillation problem across the diode rectifier caused by interaction between junction capacitance of the rectifier diode and leakage inductance of the transformer. The pronounced reverse-recovery current of high-power diodes significantly contributes to these issues by increasing power loss and voltage overshoot. Conventional energy recovery clamping circuits suffer from high voltage overshoot if the converter input voltage is wide. In this paper, a novel energy recovery clamp circuit is proposed to overcome this problem. The proposed circuit requires neither active switches nor lossy components. Therefore, the proposed circuit is very promising in high-voltage and high-power applications. Performance of the proposed circuit is verified both theoretically and experimentally with a 70-kW dc--dc converter.