The effect of reflow process on the contact resistance and reliability of anisotropic conductive film interconnection for flip chip on flex applications

The work presented in this paper focuses on the effect of reflow process on the contact resistance and reliability of anisotropic conductive film (ACF) interconnection. The contact resistance of ACF interconnection increases after reflow process due to the decrease in contact area of the conducting particles between the mating I/O pads. However, the relationship between the contact resistance and bonding parameters of the ACF interconnection with reflow treatment follows the similar trend to that of the as-bonded (i.e. without reflow) ACF interconnection. The contact resistance increases as the peak temperature of reflow profile increases. Nearly 40% of the joints were found to be open after reflow with 260 °C peak temperature. During the reflow process, the entrapped (between the chip and substrate) adhesive matrix tries to expand much more than the tiny conductive particles because of the higher coefficient of thermal expansion, the induced thermal stress will try to lift the bump from the pad and decrease the contact area of the conductive path and eventually, leading to a complete loss of electrical contact. In addition, the environmental effect on contact resistance such as high temperature/humidity aging test was also investigated. Compared with the ACF interconnections with Ni/Au bump, higher thermal stress in the Z-direction is accumulated in the ACF interconnections with Au bump during the reflow process owing to the higher bump height, thus greater loss of contact area between the particles and I/O pads leads to an increase of contact resistance and poorer reliability after reflow.     

Ultra-high-density interconnection technology of three-dimensional packaging

The study of 20-μm-pitch interconnection technology of three-dimensional (3D) packaging focused on reliability, ultrasonic flip–chip bonding and Cu bump bonding is described. The interconnection life under a temperature cycling test (TCT) was at an acceptable level for semiconductor packages. Failure analysis and finite element analysis revealed the effect of material properties. Basic studies on ultrasonic flip–chip bonding and very small Cu bump formation were investigated for low-stress bonding methods. The accuracy of ultrasonic flip–chip bonding was almost the same level as that of thermocompression bonding and the electrical connection was also confirmed. Atomic-level bonding was established at the interface of Au bumps. For Cu bump bonding, a dry process was applied for under bump metallurgy (UBM) removal. Electroless Sn diffusion in Cu was investigated and the results clarified that the intermetallic layer was formed just after plating. Finally, we succeeded in building a stacked chip sample with 20-μm-pitch interconnections.     

Under bump metallurgy study on copper/low-k dielectrics for fine pitch flip chip packaging

Because the semiconductor speed increases continuously, more usage of low-k dielectric materials to enhance the performance in Cu chips has taken place over the past few years. The implementation of copper (Cu) as an interconnect, in conjunction with the ultra-low-k materials as interlevel dielectrics or intermetal dielectrics in the fabrication of ultra-large-scale integrated circuits, has been used in the semiconductor community worldwide, especially for high-speed devices. The objective of this study is to investigate the under bump metallurgy (UBM) characterization with low-k dielectric material used in damascene Cu-integrated circuits. This paper focuses on electroless Ni/Au, Cu/Ta/Cu, and Ti/ Ni(V)/Cu/Au UBM fabrication on 8-in. damascene Cu wafers and flip chip package reliability with Pb-bearing and Pb-free solders. The interfacial diffusion study and bump shear test were carried out to evaluate the bump bonding, and the failure was analyzed with optical microscopy, scanning electron microscopy (SEM), and transmission electron microscopy (TEM). In order to investigate the thermal stability of the UBM system with Pb-free solder, high-temperature aging (above the melting temperature) was performed and each interface between the solder and UBM was observed with optical microscopy, SEM, and TEM, respectively. The failures observed and the modes are reported in the paper.     

The influence of Sn–Cu–Ni(Au) and Sn–Au intermetallic compounds on the solder joint reliability of flip chips on low temperature co-fired ceramic substrates

The formation of intermetallic compounds in the solder joint of a flip chip or chip scale package depends on the under bump metallurgy (UBM), the substrate top surface metallisation, the solder alloy and the application conditions. To evaluate the influence of intermetallic compounds on the solder joint reliability, a detailed study on the influence of the UBM, the gold finish thickness of the substrate top surface metallisation, the solder alloy and the aging conditions has been conducted. Flip chips bumped with different solder alloys were reflow-mounted on low temperature co-fired ceramic substrates. The flip chip package was then aged at high temperature and a bump shear test followed to examine the shear strength of the solder joint at certain aging intervals. It was found that the type of UBM has a great impact on the solder joint reliability. With Ni(P)/Au as the UBM, well-documented gold embrittlement was observed when the gold concentration in the eutectic SnPb solder was about 3 wt%. When Al/Ni(V)/Cu was used as the UBM, the solder joint reliability was substantially improved. Copper dissolution from the UBM into the solder gives different intermetallic formations compared to Ni(P)/Au as UBM. The addition of a small amount of copper in the solder alloy changed the mechanical property of the intermetallic compound, which is attributed to the formation of Sn–Cu–Ni(Au) intermetallic compounds. This could be used in solving the problem of the AuSn₄ embrittlement. The formation and the influence of this Sn–Cu–Ni(Au) intermetallic phase are discussed. The gold concentration in the solder joint plays a role in the formation of intermetallic compounds and consequently the solder joint reliability, especially for the Sn–Ag–Cu soldered flip chip package.     

金、铜丝球键合焊点的可靠性对比研究

金丝球焊是电子工业中应用最广泛的引线键合技术,但随着高密度封装的发展,铜丝球焊日益引起人们的关注。采用热压超声键合的方法,分别实现Au引线和Cu引线键合到Al-1%Si-0.5%Cu金属化焊盘。对焊点进行200℃老化实验的结果表明:铜丝球焊焊点的金属间化合物生长速率比金丝球焊焊点慢的多;铜丝球焊焊点具有比金丝球焊焊点更稳定的剪切断裂载荷,并且在一定的老化时间内铜丝球焊焊点表现出更好的力学性能;铜丝球焊焊点和金丝球焊焊点在老化后的失效模式不同。     

Experimental characterization and mechanical behavior analysis of intermetallic compounds of Sn–3.5Ag lead-free solder bump with Ti/Cu/Ni UBM on copper chip

Due to today’s trend towards ‘green’ products, the environmentally conscious manufacturers are moving toward lead-free schemes for electronic devices and components. Nowadays the bumping process has become a branch of the infrastructure of flip chip bonding technology. However, the formation of excessively brittle intermetallic compound (IMC) between under bump metallurgy (UBM)/solder bump interface influences the strength of solder bumps within flip chips, and may create a package reliability issue. Based on the above reason, this study investigated the mechanical behavior of lead-free solder bumps affected by the solder/UBM IMC formation in the duration of isothermal aging. To attain the objective, the test vehicles of Sn–Ag (lead-free) and Sn–Pb solder bump systems designed in different solder volumes as well as UBM diameters were used to experimentally characterize their mechanical behavior. It is worth to mention that, to study the IMC growth mechanism and the mechanical behavior of a electroplated solder bump on a Ti/Cu/Ni UBM layer fabricated on a copper chip, the test vehicles are composed of, from bottom to top, a copper metal pad on silicon substrate, a Ti/Cu/Ni UBM layer and electroplated solder bumps. By way of metallurgical microscope and scanning-electron-microscope (SEM) observation, the interfacial microstructure of test vehicles was measured and analyzed. In addition, a bump shear test was utilized to determine the strength of solder bumps. Different shear displacement rates were selected to study the time-dependent failure mechanism of the solder bumps. The results indicated that after isothermal aging treatment at 150 °C for over 1000 h, the Sn–Ag solder revealed a better maintenance of bump strength than that of the Sn–Pb solder, and the Sn–Pb solder showed a higher IMC growth rate than that of Sn–Ag solder. In addition, it was concluded that the test vehicles of copper chip with the selected Ti/Cu/Ni UBMs showed good bump strength in both the Sn–Ag and Sn–Pb systems as the IMC grows. Furthermore, the study of shear displacement rate effect on the solder bump strength indicates that the analysis of bump strength versus thermal aging time should be identified as a qualitative analysis for solder bump strength determination rather than a quantitative one. In terms of the solder bump volume and the UBM size effects, neither the Sn–Ag nor the Sn–Pb solders showed any significant effect on the IMC growth rate.     

Effect of Cu stud microstructure and electroplating process onintermetallic compounds growth and reliability of flip-chip solder bump

In electroplating-based flip-chip technology, the Cu stud and solder deposition processes are two of the most important factors affecting the reliability of solder joints. The growth of Cu-Sn intermetallic compounds (IMC) also plays a critical role. In this paper, the effect of Cu stud surface roughness and microstructures on the reliability of solder joint was studied. The surface roughness of the Cu stud was increased as the Cu electroplating current density increased. The microstructural morphology of the Cu-Sn IMC layer was affected by Cu stud surface structure. We found the growth rate of IMC layer increased with the increasing of Cu stud grain size and surface roughness during aging test. The growth kinetics of Cu-Sn intermetallic compound formation for 63Sn/37Pb solder followed the Arrhenius equation with activation energy varied from 0.78 eV to 1.14 eV. The ratios of Cu₃ Sn layer thickness to the total Cu-Sn IMC layer thickness was in the range of 0.5 to 0.15 for various Cu microstructures at 150°C during thermal aging test. The shear strength of solder bump was measured after thermal aging and temperature/humidity tests. The relationship between electroplating process and reliability of solder joints was established. The failure mode of solder joints was also analyzed     

Influence of bonding process parameters on chip cratering and phase formation of Cu ball bonds on AlSiCu during storage at 200 °C

Wire bonding remains the predominant interconnection technology in microelectronic packaging. Over the last 3 years a significant trend away from Au and towards Cu wire bonding has become apparent. This has been due to general efforts to lower manufacturing costs and price increases for raw materials like Au. Although much research has been carried out into wire bonding over recent decades, most has focused on Au ball/wedge bonding. The results of this research have shown that bonding parameters, bonding quality and reliability are closely interconnected. However, the different material properties of Cu compared to Au, such as affinity to oxidation and hardness, mean that these insights cannot be directly transferred to Cu bonding processes. Thus, further research is necessary. This paper discusses a study of bonding interface formation under various bonding parameters. Cu wire was bonded on AlSiCu0.5 metallization and a bonding parameter optimization was carried out to identify useful parameter combinations. On the basis of this optimization, different samples were assembled using parameter combinations of low, medium and high US-power and bonding force. An interface analysis was subsequently carried out using shear testing and HNO₃ etching. Intermetallic phase growth was analyzed on cross sections of devices annealed at 200 °C for 168 h and 1000 h. Contacts bonded with low bonding force and high US-power tended towards cratering during shear testing. Bonding force proved to have a significant effect on intermetallic phase formation whereas US-power was found to exert only a minor influence. The intermetallic phase formation of annealed samples was analyzed using EDX and interpreted on the basis of phase formation kinetics. Three main intermetallic phases were identified.     

Behavior of Anisotropic Conductive Film Joints Bonded with Various Forces under Temperature Fluctuation

The effects of bonding force and temperature fluctuations on the failure behaviors of anisotropic conductive film (ACF) interconnections were analyzed. Thermal shock testing was conducted to realize the temperature fluctuation environment. Two primary modes of failure were detected after thermal shock testing: formation of a non-conductive gap between conductive particles and the Au bump or Ni/Au-plated Cu pads, and delamination of the adhesive matrix from the plated Cu pads on flexible substrates. The failure mode was affected mainly by the variation in the bonding force. The main failure mode of the thermally shocked ACF joints was the non-conductive gap for the joints with low bonding forces and adhesive matrix delamination for the joints with high bonding forces. The difference in failure modes is critically discussed.     

The formation and growth of intermetallic compounds and shear strength at Sn–Zn solder/Au–Ni–Cu interfaces

The microstructures and shear strength of the interface between Sn–Zn lead-free solders and Au/Ni/Cu interface under thermal aging conditions was investigated. The intermetallic compounds (IMCs) at the interface between Sn–Zn solders and Au/Ni/Cu interface were analyzed by field emission scanning electron microscopy and transmission electron microscopy. The results showed the decrease in the shear strength of the interface with aging time and temperature. The solder ball with highly activated flux had about 8.2% increased shear strength than that with BGA/CSP flux. Imperfect wetting and many voids were observed in the fracture surface of the latter flux. The decreased shear strength was influenced by IMC growth and Zn grain coarsening. In the solder layer, Zn reacted with Au and then was transformed to the β-AuZn compound. Although AuZn grew first, three diffusion layers of γ-Ni₅Zn₂₁ compounds were formed after aging for 600 h at 150 °C. The layers divided by Ni₅Zn₂₁ (1), (2), and (3) were formed with the thickness of 0.7 μm, 4 μm, and 2 μm, respectively.     

Effects of Pd addition on Au stud bumps/Al pads interfacial reactions and bond reliability

The main purposes for developing low-alloyed Au bonding wires were to increase wire stiffness and to control the wire loop profile and heat-affected zone length. For these reasons, many alloying elements have been used for the various Au bonding wires. Although there have been many studies reported on wire strengthening mechanisms by adding alloying elements, few studies were performed on their effects on Au bonding wires and Al pad interfacial reactions. Palladium has been used as one of the important alloying elements of Au bonding wires. In this study, Au-1wt.%Pd wire was used to make Au stud bumps on Al pads, and effects of Pd on Au/Al interfacial reactions, at 150°C, 175°C, and 200°C for 0 to 1200 h thermal aging, were investigated. Cross-sectional scanning electron microscopy (SEM), energy-dispersive spectroscopy (EDS), and electron probe microanalysis (EMPA) were performed to identify intermetallic compound (IMC) phases and Pd behavior at the Au/Al bonding interface. According to experimental results, the dominant IMC was Au₅Al₂, and a Pd-rich layer was at the Au wire and Au-Al IMC. Moreover, Au-Al interfacial reactions were significantly affected by the Pd-rich layer. Finally, bump shear tests were performed to investigate the effects of Pd-rich layers on Au wire bond reliability, and there were three different failure modes. Cracks, accompanied with IMC growth, formed above a Pd-rich layer. Furthermore, in longer aging times, fracture occurred along the crack, which propagated from the edges of a bonding interface to the center along a Pd-rich layer.     

Characterization of lead-free solders and under bump metallurgies for flip-chip package

A variety of Pb-free solders and under bump metallurgies (UBMs) was investigated for flip chip packaging applications. The result shows that the Sn-0.7Cu eutectic alloy has the best fatigue life and it possess the most desirable failure mechanism in both thermal and isothermal mechanical tests regardless of UBM type. Although the electroless Ni-P UBM has a much slower reaction rate with solders than the Cu UBM, room temperature mechanical fatigue is worse than on the Cu UBM when coupled with either Sn-3.8Ag-0.7Cu or Sn-3.5Ag solder. The Sn-37Pb solder consumes less Cu UBM than all other Pb-free solders during reflow. However, Sn-37Pb consumes more Cu after solid state annealing. Studies on aging, tensile, and shear mechanical properties show that the Sn-0.7Cu alloy is the most favorable Pb-free solder for flip chip applications. When coupled with underfill encapsulation in a direct chip attach (DCA) test device, the Sn-0.7Cu bump with Cu UBM exhibits a characteristic life or 5322 cycles under -55/spl deg/C/+150/spl deg/C air-to-air thermal cycling condition.     

Effect of bump characteristics and temperature variation on the online contact resistance of anisotropic conductive joints

Anisotropic conductive film (ACF) suffers a major drawback in regard to reliability even though it has merits, such as reduction in interconnection distance, high performance, and environmental friendliness. The factor of thermal warpage may lead to a highly unreliable electrical connection in the assembly. The work presented in this paper focuses on the online contact-resistance behavior of the ACF joint during thermal shock and compares the results of two different types of dies (Au/Ni bump and bumpless). For this work, we used a flip chip of 11 × 3 mm² in dimension. The flex substrate used was made of polyimide film with an Au/Ni/Cu electrode and daisy-chained circuit for a matching die-bump pattern. The ACF that was used is an epoxy resin in which nickel and gold-coated polymer balls are dispersed. Tests for three different thermal-cycling profiles (125°C to −55°C, 140°C to −40°C, and 150°C to −65°C) were carried out. The samples bonded at a temperature of 180°C, and a pressure of 80 N was used. The initial contact resistances of Au/Ni bump and bumpless samples were 0.25 ω and 0.4 ω respectively. A comparative study was carried out from the results obtained. The results showed that for the flip-chip-on-flex (FCOF) packages having an Au/Ni bump, the increase in online contact resistance is higher than that of the FCOF packages having bumpless chips. For example, in the thermal-cycling profile of 140°C to −40°C, the online contact resistance for the Au/Ni bump raised to 4.6 ω after 180 cycles, whereas it was only 1.3 ω for the bumpless sample. The bump height and bump materials were found to be the main factor for such variation. Results show that, above the glass-transition temperature (T_g), the ACF matrix becomes less viscous, which reduces its adhesive strength and lets the higher bump height of the chip result in a higher standoff of the package and thus sliding is easier to take place. The responses by the assemblies in hot and cold conditions are examined, and in-chamber behavior of the assembly is studied and explained.     

Isothermal aging effects on the microstructure and solder bump shear strength of eutectic Sn37Pb and Sn3.5Ag solders

The reliability of the eutectic Sn37Pb (63%Sn37%Pb) and Sn3.5Ag (96.5%Sn3.5%Ag) solder bumps with an under bump metallization (UBM) consisting of an electroless Ni(P) plus a thin layer of Au was evaluated following isothermal aging at 150 °C. All the solder bumps remained intact after 1500 h aging at 150 °C. Solder bump microstructure evolution and interface structure change during isothermal aging were observed and correlated with the solder bump shear strength and failure modes. Cohesive solder failure was the only failure mode for the eutectic Sn37Pb solder bump, while partial cohesive solder failure and partial Ni(P) UBM/Al metallization interfacial delamination was the main failure mode for eutectic Sn3.5Ag solder bump.     

Reduced thermal strain in flip chip assembly on organic substrateusing low CTE anisotropic conductive film

Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances, resulting in a high performance and cost-competitive packaging method. This paper describes the usefulness of low cost flip-chip assembly using electroless Ni/Au bump and anisotropic conductive films on organic boards such as FR-4. As bumps for flip chip, electroless Ni/Au plating was performed as a low cost bumping method. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with Ni₃P precipitation above 300°C causes an increase of hardness and an increase of the intrinsic stress. As interconnection material, modified ACFs composed of nickel conductive fillers for conductive fillers, and nonconductive fillers for modification of film properties, such as coefficient of thermal expansion (CTE), were formulated for improved electrical and mechanical properties of ACF interconnection. Three ACF materials with different CTE values were prepared and bonded between Si chips and FR-4 boards for the thermal strain measurement using moire interferometry. The thermal strain of the ACF interconnection layer, induced by temperature excursion of 80°C, was decreased according to the decreasing CTEs of ACF materials. This result indicates that the thermal fatigue life of ACF flip chip assembly on organic boards, limited by the thermal expansion mismatch between the chip and the board, could be increased by low CTE ACF     

The influence of solder volume and pad area on Sn–3.8Ag–0.7Cu and Ni UBM reaction in reflow soldering and isothermal aging

This paper examines various aspects of SAC (Sn–3.8Ag–0.7Cu wt.%) solder and UBM interactions which may impact interconnection reliability as it scales down. With different solder joint sizes, the dissolution rate of UBM and IMC growth kinetics will be different. Solder bumps on 250, 80 and 40 μm diameter UBM pads were investigated. The effect of solder volume/pad metallization area (V/A) ratio on IMC growth and Ni dissolution was investigated during reflow soldering and solid state isothermal aging. Higher V/A ratio produced thinner and more fragmented IMC morphology in SAC solder/Ni UBM reflow soldering interfacial reaction. Lower V/A ratio produced better defined IMC layer at the Ni UBM interface. When the ratio of V/A is constant, the IMC morphology and growth trend was found to be similar. After 250 h of isothermal aging, the IMC growth rate of the different bump sizes leveled off. No degradation in shear strength was observed in these solder bump after 500 h of isothermal aging.     

Reliability of Au-Ge and Au-Si Eutectic Solder Alloys for High-Temperature Electronics

High-temperature electronics will facilitate deeper drilling, accessing harder-to-reach fossil fuels in oil and gas industry. A key requirement is reliability under harsh conditions for a minimum continuous operating time of 500?h at 300°C. Eutectic solder alloys are generally favored due to their excellent fatigue resistance. Performance of Au-Ge and Au-Si eutectic solder alloys at 300°C up to 500?h has been evaluated. Nanoindentation results confirm the loss of strength of Au-Ge and Au-Si eutectic solder alloys during thermal aging at 300°C, as a result of grain coarsening. However, the pace at which the Au-Ge eutectic alloy loses its strength is much slower when compared with Au-Si eutectic alloy. The interfacial reactions between these eutectic solder alloys and the underbump metallization (UBM), i.e., electroless nickel immersion gold (ENIG) UBM and Cu/Au UBM, have been extensively studied. Spalling of Au₃Cu intermetallic compound is observed at the interface between Au-Ge eutectic solder and the Cu/Au UBM, when aged at 300°C for 500?h, while the consumption of ENIG UBM is nominal. Unlike the Au-Si solder joint, hot ball shear testing at high temperature confirmed that the Au-Ge joint on ENIG UBM, when aged at 300°C for 500?h, could still comply with the minimum qualifying bump shear strength based on the UBM dimension used in this work. Thus, it has been determined that, among these two binary eutectic alloys, Au-Ge eutectic alloy could fulfill the minimum requirement specified by the oil and gas exploration industry.     

Flip chip interconnect systems using copper wire stud bump and leadfree solder

This research focuses on flip chip interconnect systems consisting of wire stud bumps and solder alloy interconnects. Conventional gold (Au) wire stud bumps and new copper (Cu) wire stud bumps were formed on the chip by wire stud bumping. Cu wire studs were bumped by controlling the ramp rate of ultrasonic power to eliminate the occurrence of under-pad chip cracks that tend to occur with high strength bonding wire. Lead free 96Sn3.5Ag0.5Cu (SnAgCu) alloy was used to interconnect the wire studs and printed circuit board. A comparison was made with conventional eutectic 63Sn37Pb (SnPb) alloy and 60In40Pb (InPb) alloy. Test vehicles were assembled with two different direct chip attachment (DCA) processes. When the basic reflow assembly using a conventional pick and place machine and convection reflow was used, 30% of the lead free test vehicles exhibited process defects. Other lead free test vehicles failed quickly in thermal shock testing. Applying the basic reflow assembly process is detrimental for the SnAgCu test vehicles. On the other hand, when compression bonding assembly was performed using a high accuracy flip chip bonder, the lead free test vehicles exhibited no process defects and the thermal shock reliability improved. Cu stud-SnAgCu test vehicles (Cu-SnAgCu) in particular showed longer mean time to failure, 2269 cycles for the B stage process and 3237 cycles for high temperature bonding. The C-SAM and cross section analysis of the Cu stud bump assemblies indicated less delamination in thermal shock testing and significantly less Cu diffusion into the solder compared to Au stud bumped test vehicles. The Cu stud-SnAgCu systems form stable interconnects when assembled using a compression bonding process. Moreover, Cu wire stud bumping offers an acceptable solution for lead free assembly     

Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones

Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications.     

Bumpless interconnect through ultrafine Cu electrodes by means of surface-activated bonding (SAB) method

In this paper, we demonstrate the feasibility of ultrahigh-density bumpless interconnect by realizing the ultrafine pitch bonding of Cu electrodes at room temperature. The bumpless interconnect is a novel concept of bonding technology that enables a narrow bonding pitch of less than 10 /spl mu/m by overcoming the thermal strain problem. In the bumpless structure, two thin layers including an insulator and metallic interconnections on the same surface are bonded at room temperature by the surface-activated bonding (SAB) method. In order to realize the bumpless interconnect, we invented a SAB flip-chip bonder that enabled the alignment accuracy of /spl plusmn/1 /spl mu/m in the high vacuum condition. Moreover, the fabrication process of ultrafine Cu electrodes was developed by using the damascene process and reactive ion beam etching (RIE) process, and the bumpless electrodes of 3 /spl mu/m in diameter, 10 /spl mu/m in pitch, and 60 nm in height were formed. As a result, we succeeded in the interconnection of 100 000 bumpless electrodes with the interfacial resistance of less than 1 m/spl Omega/. An increase of the resistance was considerably small after thermal aging at 150/spl deg/C for 1000 h.