热冲击应力对非硅MEMS器件可靠性的影响

以非硅MEMS器件作为研究对象,建立了非硅MEMS器件基本结构的热-机械耦合的有限元分析模型,并加载–60~+150℃的热冲击应力进行有限元分析。分析结果表明,热冲击应力导致结构层间由于热膨胀系数失配而产生应力,其中铜层与铬层界面间应力最大,且主要表现为x方向的剪切应力,其随温度循环在–75.6 MPa至125.3MPa之间转换,因此该界面间最易发生疲劳失效,导致结构分层。在此基础上,对某非硅MEMS惯性开关开展了热冲击试验和随机振动试验,验证了理论分析结果的正确性,找到了非硅MEMS器件的主要失效模式。     

多层UV-LIGA惯性开关温度可靠性评估研究

为了评估采用UV-LIGA技术制作的多层MEMS惯性开关的温度可靠性,进行了可靠性强化试验。介绍了开关的结构特征、工作原理和制作工艺。建立了试验系统,对开关进行温度循环和振动冲击试验。利用扫描电子显微镜观察开关失效模式,并利用公式进行热应力分析。试验结果表明,开关主要失效模式为位错和分层。开关热应力分析结果表明,种子层为开关薄弱位置。结合可靠性强化实验和热应力分析结果,从结构设计和制作工艺角度提出了可靠性强化方法。该研究为应用于极限温度环境下的多层UV-LIGA惯性器件的设计与制作提供了试验依据。     

MEMS多层结构的热应力分析

温度载荷能够引起MEMS多层薄膜结构发生翘曲和分层等失效模式,而界面应力则是引起这些失效的直接原因。根据Suhir.E的双金属带热应力分布理论,对温度载荷作用下MEMS界面中的剪应力和剥离应力的分析表明,这两种应力随着与界面中心距离的增大呈指数增加,在界面端处达到最大值。界面应力与材料热膨胀系数和所加载温度呈线性相关,另外还与两材料层的厚度密切相关。以铜/铬组成的双层结构为例,利用Matlab数值仿真研究了界面应力与材料层厚度的关系,结果表明,界面应力与两材料层厚度比有关,当铜层和铬层厚度比为1.5时,层间剪应力和剥离应力均较小,可有效提高MEMS结构的可靠性,降低分层失效的概率。     

静电式RF MEMS开关的可靠性

MEMS开关是最常见的RF MEMS控制元件,是RF结构中一个关键的MEMS器件。长期可靠性是目前制约MEMS开关商业化进程中的一个主要问题。主要综述了静电式RF MEMS开关可靠性的新进展。欧姆式开关通常由于黏附或接触电阻的增大而失效,电容式开关的主要失效机理则与电介质层的充电有关。接触材料的选择是决定欧姆开关可靠性最重要的一个因素,"主动断开/被动接触"MEMS开关适用于软金属材料欧姆接触的可靠性要求。改善电容式开关可靠性的途径是改善介电层、优化驱动电压波形等以减小介质层的充电。     

温度应力对MEMS器件分层失效的影响规律

通过分析MEMS器件多层结构界面裂纹疲劳扩展的影响因素及温度应力对界面疲劳的影响机理,建立了温度应力对分层失效影响的理论模型,并建立了双材料结构层的有限元分析模型,研究了温度应力对界面裂纹疲劳扩展的影响规律。研究结果表明:在温度应力作用下,裂纹易沿界面方向扩展;温度幅值升高,裂纹疲劳扩展速率呈指数关系增大;裂纹从形成初期到扩展至分层失效的过程中历经较慢扩展、相对平稳扩展和快速扩展三个阶段。     

温度应力对MEMS器件分层失效的影响规律

通过分析MEMS器件多层结构界面裂纹疲劳扩展的影响因素及温度应力对界面疲劳的影响机理,建立了温度应力对分层失效影响的理论模型,并建立了双材料结构层的有限元分析模型,研究了温度应力对界面裂纹疲劳扩展的影响规律。研究结果表明:在温度应力作用下,裂纹易沿界面方向扩展;温度幅值升高,裂纹疲劳扩展速率呈指数关系增大;裂纹从形成初期到扩展至分层失效的过程中历经较慢扩展、相对平稳扩展和快速扩展三个阶段。     

MEMS加速度计可靠性评价技术

MEMS加速度计是动作识别设备、姿态控制设备等电子设备的核心器件,其功能失效会严重影响设备的可靠性。而目前国内外还没有MEMS器件的可靠性实验标准,这在一定程度上制约了MEMS加速度计的应用与发展。针对该现状,深入研究了MEMS加速度计敏感部件的失效模式及失效机理,得到了典型环境应力与器件失效的关系,分析了加载环境应力可能导致器件失效的环境实验,并选取了相应的MEMS加速度计产品进行了可靠性实验验证,得出了MEMS加速度计可靠性评价的初步试行方案。     

MEMS加速度计在振动环境下的可靠性分析

以电容式MEMS加速度计的悬臂梁结构为研究对象,分析了振动环境下MEMS加速度计的典型失效模式及失效机理;在Miner理论的基础上,引入了应力-寿命曲线,建立了疲劳可靠性模型;在考虑强度退化前提下,基于应力强度干涉理论建立了塑性形变可靠性模型;运用蒙特卡洛法验证了两种可靠性模型的准确性,并分析了模型关键参数对可靠度的影响。结果显示,振动应力水平和材料的屈服强度对可靠度有显著的影响,减小应力幅值,增大屈服强度,可以提高MEMS加速度计的可靠性。     

基于ANSYS的IGBT模块的失效模式

功率循环(PC)试验和温度循环(TC)试验是对绝缘栅双极型晶体管(IGBT)模块进行可靠性考核的两个基本试验,可以有效暴露出器件封装所存在的问题。基于ANSYS有限元分析软件,分别研究了IGBT模块在功率循环和温度循环两种不同的试验情况下的温度分布与应力、应变分布的情况。研究表明在这两种情况下IGBT模块的失效模式是不同的。功率循环条件下器件的温差较小,但温度、应力往往集中分布在引线键合点及其下方,一般失效会发生在引线键合点处。而温度循环下温度分布均匀,但高低温温差较大,更能考察器件在严酷的环境条件下的可靠性,由于每层结构的边缘位置处剪切应力较大,失效常常由每层结构的边缘部位开始,一般会发生芯片和陶瓷基板的断裂和焊料层疲劳等失效现象。     

Pb90Sn10焊点硅基器件与PCB板组装的温循可靠性研究

采用有限元仿真和实验两者相结合的方法,对-40～70℃使用环境下的Pb₉₀Sn₁₀焊点硅基器件与PCB板组装的组件,选择-55～85℃温度循环条件进行可靠性分析和研究。Anand模型仿真分析焊点在温循下应力应变行为,提取模型焊点在最后一个温度循环结束时的等效塑性应变分布并进行分析,确定最易发生热疲劳失效的关键焊点和关键位置。基于Coffin-Manson方程对热循环条件下焊点的服役寿命和失效模式进行预测。仿真结果表明焊点失效机理为热疲劳失效,失效模式为焊点开裂,失效循环周期为3 984 cycles。实验表明：温度循环500次,未出现焊点裂纹、空洞等缺陷;温度循环2 000次后焊点形貌由球形变为椭球形,焊点未出现明显缺陷。     

A Rapid Life-Prediction Approach for PBGA Solder Joints Under Combined Thermal Cycling and Vibration Loading Conditions

While some electronic products are routinely subjected to concurrent vibration and temperature cycle loading, the ability to accurately model and estimate life expectancy of hardware under such conditions still presents a unique challenge. For combined vibration and temperature cycling, one of the most likely causes of failure is the fatigue of solder interconnects. This paper presents an approach to predict solder joint life under combined thermal cycling and vibration loading conditions, by taking into account temperature effects and loading interactions. Combined loading experiment on a test vehicle populated with PBGA packages was used to demonstrate this approach.      

Chip warpage model for reliability prediction of delamination failures

A new experimental method to predict reliability for ACA type packages under temperature cycling is developed and proposed. The method introduces a new damage parameter that can be easily measured by experiment. It is proved that the linear elastic parameter, dw/dT which represents the rate of change of chip warpage with respect to temperature, efficiently reflects the common failure mechanism of ACA type packages, the interfacial delamination between the chip and the adhesive. It is demonstrated, both experimentally and numerically, that the size of delamination affects the warpage behavior of the chip. The dw/dT of the chip is monitored in real time using laser interferometers under thermal fatigue cycles up to 3000. The gradual decrease in warpage due to progressive increase in delamination is clearly emerged. As a result, a reliability curve that can predict the size of delamination and remained life is obtained. The new long-term reliability prediction method developed in this study can be applied to various advanced packages, e.g. underfilled flip–chip or TSV stacked chip packages, that embrace interfacial delamination as primary failure mode.     

Failure study of Sn37Pb PBGA solder joints using temperature cycling,random vibration and combined temperature cycling and random vibration tests

In this paper, the tin-lead (Sn-37wt%Pb) eutectic solder joints of plastic ball grid array (PBGA) assemblies are tested using temperature cycling, random vibrations, and combined temperature cycling and vibration loading conditions. The fatigue lives, failure modes for the solder joints and the typical locations of the failed solder joints for single-variable loading and combined loading conditions are compared and analyzed. The results show much earlier solder joint failure for combined loading than that for either temperature cycling or pure vibration loading at room temperature. The primary failure mode is cracking within the bulk solder under temperature cycling, whereas the crack propagation path is along the intermetallic compound (IMC) layer for vibration loading. The solder joints subjected to combined loading exhibit both types of failure modes observed for temperature cycling and vibration loading; in addition, cracking through the IMC and the bulk solder is observed in the combined test. For temperature cycling and vibration loading, the components in the central region of the printed circuit board (PCB) have more failed solder joints than other components, whereas for combined loading, the number of failed solder joints in the components in different locations of the PCB is approximately the same.     

An investigation on thermal reliability of underfilled PBGA solder joints

The failure mechanism, as well as cycles to failure, of two groups of PBGA samples (with/without underfill) for thermal shock in the range of -40/spl square/-125/spl square/ were presented. The experiment shows that the solder ball in the samples without underfill cracked after 500 times cycle, while no crack was found in the underfilled samples even after 2700 cycles. However, the die attach layer delaminated after 500 cycles and the PCB cracked in the underfilled samples after long time cycling. C-SAM is employed to investigate the delamination in the underfilled samples. Highly concentrated stress-strain induced by the CTE mismatch between the BGA component and the PCB, coarsened grain and two kinds of intermetallic compounds (Ni/sub 3/Sn/sub 2//NiSn/sub 4/) which formed during reflow and thermal cycling and their impact on the reliability of solder joints are discussed in this paper. The initiation of the crack and its propagation are also presented in this paper. By means of dye penetrant test, the authors reveal the distribution of microcracks in the solder ball array. In addition, this paper includes results of simulation, which further verified its conclusions.     

Failure mechanism analysis of off-state drain-to-source leakage current failure of a commercial 650 V discrete GaN-on-Si HEMT power device by accelerated power cycling test

A gallium nitride on silicon substrate (GaN-on-Si) high-electron-mobility transistor (HEMT) power device is commercially available. The package-level reliability of a GaN-based power device is necessary to respond market demands. Power cycling (PC) tests are a useful method to investigate the reliability of a packaged power component closer to a real application. An off-state drain-to-source leakage current failure (IDSS) of a 650 V discrete GaN-on-Si power device under PC test was reported in a previous study. In this paper, to investigate failure mechanism from the last study experiments to verify the root cause are conducted. Scanning acoustic microscope (SAM) images of failure samples exhibit the solder delamination between the discrete chip and the lead frame. The reasonable hypothesis of a correlation between the delamination and IDSS failure is suggested and is tested with a detailed analysis and supplemental experiments. In the process of analyzing the above hypothesis, the new risk of IDSS failure caused by losing electrical connection of silicon substrate rises. The solution for the risk also is proposed. It is discussed that the IDSS failure phenomenon is related to thermal stress induced during PC test. The tests and the analysis indicate that the failure is a thermal stress induced IDSS leakage, not matched previously reported mechanisms.     

Improved reliability in small multichip ball grid arrays

The subject of this paper is a 14×22 mm ball grid array (BGA) integrated circuit assembly containing two or three chips. Three failure modes came to light in the reliability testing of this BGA package: delamination of solder resist from the top copper layer occurred in moisture resistance testing; cracking of the top layer solder resist and consequent cracking of the top copper layer occurred in temperature cycling; and cracking of the bottom layer solder resist which propagated into the bottom copper layer occurred in thermal shock. The failure analysis techniques used to disclose these failures are presented. Finite element analysis of thermomechanical stress within the multichip structure was carried out. The purpose was to find the root cause of one of the failure modes and to explore possible means of overcoming the stress damage. The characteristics of the original and modified substrate layout designs are detailed. The improved performance in reliability testing is compared with the original. All failure modes were eliminated in the final design, and the product was qualified to greatly improved reliability standards.