两步生长和直接生长GaAs/Si单晶薄膜的比较

报道了采用热壁外延(HWE)技术,在(100),(111)和(211)三种典型Si表面通过两步生长和直接生长法制备GaAs单晶薄膜,经过拉曼光谱、霍尔测试和荧光光谱分析比较,得出结论:(1)相同取向Si衬底,两步生长法制备的GaAs薄膜结晶质量比直接生长法制备的GaAs薄膜的要好;(2)采用HWE技术在Si上异质外延GaAs薄膜,其表面缓冲层的生长是降低位错、提高外延质量的基础;(3)不同取向Si衬底对GaAs外延层结晶质量有影响, (211)面外延的GaAs薄膜质量最好,(100)面次之,(111)面最差.     

离化团束方法在GaAs衬底上外延CdTe单晶薄膜

利用离化团束外延(ICBE)技术在GaAs(100)衬底上生长了(100)和(111)两种晶向的CdTe外延层.X光衍射和 RHEED分析结果表明外延层为单晶薄膜,双晶衍射摆动曲线半高宽达630弧秒.本文研究了离化团能量和生长温度对外延层晶向和质量的关系。结果表明,当预热处理温度为480℃,外延取向关系为CdTe(100)//GaAs(100);当预热处理为580℃,外延取向关系为 CdTe(100)+(111)//GaAs(100).离化团束的能量对外延膜的结晶性能起着重要作用.     

Si/CdTe复合衬底HgCdTe液相外延材料的生长与性能分析

通过改进推舟液相外延技术,成功地在(211)晶向Si/CdTe复合衬底上进行了HgCdTe液相外延生长,获得了表面光亮的HgCdTe外延薄膜.测试结果表明,(211)Si/CdTe复合衬底液相外延HgCdTe材料组分及厚度的均匀性与常规(111)CdZnTe衬底HgCdTe外延材料相当;位错腐蚀坑平均密度为(5～8)×105 cm-2,比相同衬底上分子束外延材料的平均位错密度要低一个数量级;晶体的双晶半峰宽达到70″左右.研究结果表明,在发展需要低位错密度的大面积长波HgCdTe外延材料制备技术方面,Si/CdTe复合衬底HgCdTe液相外延技术可发挥重要的作用.     

Si/CdTe复合衬底HgCdTe液相外延材料的生长与性能分析

通过改进推舟液相外延技术,成功地在(211)晶向Si/CdTe复合衬底上进行了HgCdTe液相外延生长,获得了表面光亮的HgCdTe外延薄膜.测试结果表明,(211)Si/CdTe复合衬底液相外延HgCdTe材料组分及厚度的均匀性与常规(111)CdZnTe衬底HgCdTe外延材料相当;位错腐蚀坑平均密度为(5～8)×105 cm-2,比相同衬底上分子束外延材料的平均位错密度要低一个数量级;晶体的双晶半峰宽达到70″左右.研究结果表明,在发展需要低位错密度的大面积长波HgCdTe外延材料制备技术方面,Si/CdTe复合衬底HgCdTe液相外延技术可发挥重要的作用.     

高质量的热壁外延CdTe(111)薄膜

本文测量了热壁外延CdTe/(111)CdTe薄膜的荧光光谱,并与CdTe体材料的荧光光谱进行了比较,证实了热壁外延CdTe/(111)CdTe薄膜具有很高的质量。实验所用热壁外延CdTe薄膜的生长条件如下:衬底CdTe用Bridgman方法生长,晶向为(111),经机械抛光、化学机械抛光以及(酒精+Br_2)溶液腐蚀。外延之前,衬底在超高真空中在350℃温度下热处理。外延时,使用单个CdTe源,温度为470～550℃,衬底温度     

用热壁外延技术在CdTe衬底上生长CdTe薄膜

利用热壁外延技术在CdTe衬底的(111)A面和B面生长了CdTe薄膜。源温度和衬底温度分别在670～800℃和600～760℃之间,生长速率为0.8～1.3μm/h。X射线衍射和荧光分析表明,CdTe外延层为[111]方向生长的高纯单晶薄膜,外延层表面组分和纵向组分均勺;回摆曲线峰半高宽的典型值为1.38′,表明外延层为高质量的CdTe单晶膜。     

GaAs衬底上生长CdTe的取向控制

在(100)GaAs衬底上生长CdTe往往会产生两种取向,即:(100)方向,CdTe[110] || GaAs [110]或(111)方向,CdTe[112]||GaAs[110]。作为后者,外延层和衬底间晶格失配率上有0.7％,而前者却达14.6％。因此,从外延质量的角度考虑,必须人为控制CdTe外延层,使之在衬底上取(111)生长方向。对此,已有过研究结果和解决的办法,但都难以达到高重     

利用分子束外延方法在GaAs衬底上制备CdTe单晶薄膜

利用分子束外延方法在国内首次在(100)GaAs衬底上可控制的获得了(100)和(111)两种晶向的CdTe外延层。X光的衍射结果表明外延层为单晶薄膜。光荧光的半峰宽为10meV左右。本文研究了生长条件对外延层晶向的影响。发现,GaAs衬底表面的平整度和洁净度是影响外延层晶向的两个关键因素。我们已在所得到的CdTe缓冲层上成功地生长出Hg_(1-x)Cd_xTe单晶薄膜。     

HWE生长条件对CdTe/Si薄膜结构特性的影响

研究了热壁外延(HWE)生长条件对Si(100)衬底上沉积外延的多晶CdTe薄膜的晶粒尺寸和取向的影响.用SEM和XRD技术分析了不同外延时间、不同衬底温度及不同源温下外延膜的表面形貌和结构特征.SEM发现随着外延时间的增加或衬底温度的提高,晶粒尺寸明显增大;XRD显示所有的外延薄膜均为面心立方结构,并高度显示优势取向(111),且随着衬底温度或薄膜厚度的增加,(111)峰的衍射强度增加,显示薄膜的择优取向更好.其原因是面心立方结构中,(111)表面具有的表面自由能最低.通过对不同外延时间下薄膜厚度的测试发现,薄膜具有加速生长趋势.衬底温度及源温对外延层厚度均有较大的影响.     

在GaAs衬底上MOCVD生长的CdTe光致发光

近年来,在 GaAs 衬底上 MOCVD 生长CdTe 和 Hg_xCd_(1-x)Tc 外延层已经得到广泛的研究。但 CdTe 作为衬底材料,缺陷密度大,尚须进一步的改善。在各种高质量的单晶衬底上,如 InSb 和 GaAs 上进行异质生长,提高了 CdTe 外延层的质量。尽管 GaAs 和 CdTe之间有很大的晶格失配,在 GaAs 衬底上能够生长高质量的 CdTe 外延层.X 射线衍射、反射高能电子束衍射、电容—电压法和 Hall     

Te-rich liquid phase epitaxial growth of HgCdTe on Si-based substrates

The growth of high quality (111)B oriented HgCdTe layers on CdZnTe/GaAs/Si and CdTe/Si substrates by Te-rich slider liquid phase epitaxy (LPE) is reported. Although the (111) orientation is susceptible to twinning, a reproducible process yielding twin-free layers with excellent surface morphology has been developed. The electrical properties and dislocation density in films grown on these substrates are comparable to those measured in HgCdTe layers grown on bulk CdTe substrates using the same LPE process. This is surprising in view of the large lattice mismatch that exists in these systems. We will report details of both the substrate and HgCdTe growth processes that are important to obtaining these results.     

采用(211)碲锌镉衬底制备碲镉汞液相外延薄膜

文中对(211)晶向的CdZnTe衬底进行液相外延生长HgCdTe。获得的碲镉汞液相外延材料的组分为0. 30 ～0. 33,薄膜厚度为10 ～15μm,表面缺陷密度为500cm- 2 ,材料的FWHM达到24弧秒,位错腐蚀坑密度约为2 ×105 cm- 2 ,该材料的表面形貌与采用(111)晶向衬底的HgCdTe外延材料有较大区别。     

TEM Characterization of HgCdTe/CdTe Grown on GaAs(211)B Substrates

A microstructural study of HgCdTe/CdTe/GaAs(211)B and CdTe/GaAs(211)B heterostructures grown using molecular beam epitaxy (MBE) was carried out using transmission electron microscopy and small-probe microanalysis. High-quality MBE-grown CdTe on GaAs(211)B substrates was demonstrated to be a viable composite substrate platform for HgCdTe growth. In addition, analysis of interfacial misfit dislocations and residual strain showed that the CdTe/GaAs interface was fully relaxed except in localized regions where GaAs surface polishing had caused small pits. In the case of HgCdTe/CdTe/GaAs(211)B, the use of thin HgTe buffer layers between HgCdTe and CdTe for improving the HgCdTe crystal quality was also investigated.     

分子束外延HgCdTe薄膜的CdTe缓冲层特性研究

CdTe是GaAs衬底上分子束外延(MBE)HgCdTe薄膜时的缓冲层,引入缓冲层的目的是减小失配位错,CdTe缓冲层的生长直接影响到后续HgCdTe薄膜的制备质量,然而目前现有文献鲜有报道CdTe缓冲层的最佳厚度.采用X射线双晶衍射、位错腐蚀坑密度(EPD)、FT-IR和椭圆偏振光谱的方法,从CdTe缓冲层厚度对位错密度的影响入手,分析并确定了理想的CdTe缓冲层厚度.     

Substrate quality impact on the carrier concentration of undoped annealed HgCdTe LPE layers

The impact of Te precipitates and impurities, in CdZnTe or CdTe substrates, on grown liquid phase epitaxy (LPE) HgCdTe layer hole concentrations was studied. The carrier concentrations in capped annealed LPE HgCdTe layers grown on CdZnTe substrates with large densities of Te precipitates are frequently significantly higher than those expected for HgCdTe annealed under Hg-deficient conditions. The carrier concentration in the LPE layer, due to the diffusion of copper ions from contaminated CdTe substrates into the layer, is strongly affected by the polarity of the (111)-oriented substrates. Layers grown on the (111)A face showed very high concentrations of Cu, whereas in those grown on the (111)B face normal carrier concentrations were achieved. These phenomena are discussed on the basis of defects formed either in the epilayer or in the layer-substrate interface.     

束源杂质引发的MBE HgCdTe表面缺陷

研究了利用GaAs作为衬底的HgCdTe MBE薄膜的表面缺陷，发现其中一类缺陷与Hg源中杂质有关。采用SEM对这类缺陷进行正面和横截面的观察，并采用EDX对其正面和横截面进行成分分析。并设计了两个实验：其一，在CdTe／GaAs衬底上，低温下用Hg源照射20min，再在其上继续高温生长CdTe；其二，在CdTe／GaAs衬底上，一直用Hg源照射下高温生长CdTe。两个实验后CdTe表面都出现与HgCdTe表面相比在形状和分布上类似的表面缺陷，采用光学显微镜和SEM对CdTe表面缺陷进行了观察，通过CdTe表面缺陷和HgCdTe表面缺陷的比较，我们证实了这类表面缺陷的成核起源于Hg源中杂质。     

GaSb: A New Alternative Substrate for Epitaxial Growth of HgCdTe

In this work, GaSb is proposed as a new alternative substrate for the growth of HgCdTe via molecular beam epitaxy (MBE). Due to the smaller mismatch in both lattice constant and coefficient of thermal expansion between GaSb and HgCdTe, GaSb presents a better alternative substrate for the epitaxial growth of HgCdTe, in comparison to alternative substrates such as Si, Ge, and GaAs. In our recent efforts, a CdTe buffer layer technology has been developed on GaSb substrates via MBE. By optimizing the growth conditions (mainly growth temperature and VI/II flux ratio), CdTe buffer layers have been grown on GaSb substrates with material quality comparable to, and slightly better than, CdTe buffer layers grown on GaAs substrates, which is one of the state-of-the-art alternative substrates used in growing HgCdTe for the fabrication of mid-wave infrared detectors. The results presented in this paper indicate the great potential of GaSb to become the next generation alternative substrate for HgCdTe infrared detectors, demonstrating MBE-grown CdTe buffer layers with rocking curve (double crystal x-ray diffraction) full width at half maximum of ～60 arcsec and etch pit density of ～10⁶ cm^?2.     

Recent Progress in MBE Growth of CdTe and HgCdTe on (211)B GaAs Substrates

Alternate substrates for molecular beam epitaxy growth of HgCdTe including Si, Ge, and GaAs have been under development for more than a decade. MBE growth of HgCdTe on GaAs substrates was pioneered by Teledyne Imaging Sensors (TIS) in the 1980s. However, recent improvements in the layer crystal quality including improvements in both the CdTe buffer layer and the HgCdTe layer growth have resulted in GaAs emerging as a strong candidate for replacement of bulk CdZnTe substrates for certain infrared imaging applications. In this paper the current state of the art in CdTe and HgCdTe MBE growth on (211)B GaAs and (211) Si at TIS is reviewed. Recent improvements in the CdTe buffer layer quality (double crystal rocking curve full-width at half-maximum?≈?30?arcsec) with HgCdTe dislocation densities of ≤10⁶?cm^?2 are discussed and comparisons are made with historical HgCdTe on bulk CdZnTe and alternate substrate data at TIS. Material properties including the HgCdTe majority carrier mobility and dislocation density are presented as a function of the CdTe buffer layer quality.     

Dislocation profiles in HgCdTe(100) on GaAs(100) grown by metalorganic chemical vapor deposition

We studied dislocation etch pit density (EPD) profiles in HgCdTe(lOO) layers grown on GaAs(lOO) by metalorganic chemical vapor deposition. Dislocation profiles in HgCdTe(lll)B and HgCdTe(lOO) layers differ as follows: Misfit dislocations in HgCdTe(lll)B layers are concentrated near the HgCdTe/CdTe interfaces because of slip planes parallel to the interfaces. Away from the HgCdTe/CdTe interface, the HgCdTe(111)B dislocation density remains almost constant. In HgCdTe(lOO) layers, however, the dislocations propagate monotonically to the surface and the dislocation density decreases gradually as dislocations are incorporated with increasing HgCdTe(lOO) layer thicknesses. The dislocation reduction was small in HgCdTe(lOO) layers more than 10 μm from the HgCdTe/CdTe interface. The CdTe(lOO) buffer thickness and dislocation density were similarly related. Since dislocations glide to accommodate the lattice distortion and this movement increases the probability of dislocation incorporation, incorporation proceeds in limited regions from each interface where the lattice distortion and strain are sufficient. We obtained the minimum EPD in HgCdTe(100) of 1 to 3 x 10⁶ cm^-2 by growing both the epitaxial layers more than 8 μm thick.