一种CMOS高阶曲率补偿的带隙基准源电路的设计

为解决传统CMOS带隙基准电压源的温度系数较高的问题,采用高阶曲率补偿方法,提出了一种新型的带隙基准电压源,这种基准电压源的结构简单同时具有良好耗能性能,并且基准电压的温度系数得到一定的优化.利用NMOS管工作在亚阈值区域时漏电流和栅源电压的非线性特性,通过引入与基准电压温度系数成相反趋势的高阶补偿电流,降低基准电压的温度系数,以较少的硬件消耗为代价大幅提高了其温度特性,最后推导出补偿后的基准电压的计算公式.基于0.18μm BCD工艺进行仿真,结果表明:在-40℃~150℃温度范围内,基准电压的温度系数为6.94×10~(-6);电源电压VDD在2.5~5.0 V范围内,线性调整率为0.033%,电路在5 V电源电压为下工作电流为7.36μA;在典型工艺下(TT),电源抑制比(PSRR)为77.4 dB.基准电压的温度特性的理论分析结果与仿真结果吻合较好,通过高阶补偿后,带隙基准电压源表现出优良的性能,满足了带隙基准源的低功耗和低温漂的设计要求.     

一种用电流基准核作温度互补性补偿的基准电压源

为克服传统带隙基准源在温度性能上的缺陷,设计了一种低温度系数的带隙基准电路。该电路在传统电流模基准结构的基础上,引入一个工作在亚阈值区电流基准核产生的电流来达到高阶补偿的目的。在一阶补偿的基础上,补偿电流的进一步补偿,大大降低了基准输出的温度系数。电路设计采用0.18μm的CMOS工艺,利用Cadence软件的Spectre仿真工具对电路进行仿真,仿真结果表明,在2.7V电源电压下,基准输出电压为1.265V,温度在-40～125℃变化时,基准输出电压仅变化0.2mV,相比一阶补偿的变化（约为2.5mV）,精度提升了10多倍;电源电压在1.8～3.5V变化时,基准输出电压变化4.5mV;在出色的温度性能下有良好的抗干忧性,满足了高性能基准源的要求。     

带有修调的分段曲率补偿带隙基准电路

为得到高精度低温度系数、高电源抑制比的基准电压,同时为了降低工艺中非理想性因素的影响,设计了一种新的带有修调的分段曲率补偿基准电路. 通过利用电阻分压和工作在亚阈值区域的MOSFET的电学特性,产生正温度系数和负温度系数的电流,在高温段和低温段分别对带隙基准电压进行曲率补偿,提出了一种新的快速优化基准电压温度系数的芯片级修调方法,包含温度系数修调和电压幅值修调,可以快速获得最低温度系数对应码值以提升工作效率.基于0.35 μm BCD工艺,流片验证了该修调方案的可行性.结果表明:在-40℃~125℃内,基准电压最低仿真温度系数为0.84×10^-6/℃,最低实测温度系数为5.33×10^-6/℃,随机抽样结果显示温度系数的平均值为7.47×10^-6/℃;采用基于计算斜率的修调方法,测试10块芯片的平均修调次数为3.5次,与使用逐次逼近的修调方法相比,效率提升59.8％;低温度系数的带隙基准电压有利于提升电池管理芯片对电池剩余电量估算的准确性,该带隙基准电路已成功应用于电池管理芯片内高精度模数转换器中.     

CMOS带隙基准电压源电路的模拟

利用CSMC0．6μmCMOS标准工艺及OrCAD模拟电路设计软件环境,设计了2种具有曲率补偿的带隙基准电压源电路,并用Hspice对电路的温漂、电源抑制比、电源电压稳定性及电路功耗进行了仿真。仿真结果表明,第1种在-20℃～130℃温度范围内,温度系数为29．97×10^-6／℃;第2种在-20℃～130℃温度范围内,温度系数为12．73×10^-6／℃。     

高性能分段温度曲率补偿基准电压源设计

针对带隙基准电压源温漂高、电源抑制比(PSRR)低的问题,提出一种新颖的分段曲率补偿技术.该电路将基准源工作的全温度范围划分为3个区间,对各段温度区间进行不同的温度补偿,同时引入电流环负反馈结构,提高电路在低频时的电源抑制比,实现在-40～150℃内,温度系数为1.24×10-6,在DC时电源抑制比为-137dB.该电路采用TSMC0.6μmBCD工艺设计实现,芯片面积为0.5mm2,关断电流小于0.1μA,工作静态功耗为125μW.投片测试结果验证了电路设计的正确性,当电源电压为2.5～6.0V时,该基准源输出电压摆幅仅为0.220mV.     

一种高精度低温漂带隙基准电路的设计与实现

针对带隙基准电路对集成电路精度的影响,提出了一种新的低温漂带隙基准电路。通过分段温度补偿,补偿了带隙基准电路,减小了温度漂移,优化了基准的温度性能。基于西岳公司3μm18V双极工艺,设计了基准电路和版图,并进行流片。仿真和流片结果表明:在典型工艺角下,基准在-55℃~125℃内,温度系数为1.7×10 ^-6~6.0×10 ^-6/℃;在2.2V的电源幅度范围下,具有0.03 mV/V的电源抑制特性。该电路已成功应用于一款线性稳压电源中。     

一种二阶补偿的高精度带隙基准电压源设计

基于charter 0.35μm标准CMOS工艺,设计了一种带自启动电路的高精度、低温漂、低功耗带隙基准电压源。电路在传统带隙基准源的基础上进行改进,利用不同材料电阻温漂系数的比值实现二阶补偿。仿真结果表明,在-40-120℃范围内,输出电压达到1.148 V,平均温漂系数为4.9ppm/℃,功耗仅为57μW。     

基于MOSFET失配分析的低压高精度CMOS带隙基准源

分析了MOSFET失配对差分放大器失调电压影响的机理,介绍了降低失调电压提高精度的斩波调制技术的工作机理,在此基础上实现了一种低电压高精度带隙基准电压源设计．利用斩波调制技术有效地减小了带隙基准源中运放的失调所引起的误差,提高了基准源的精度．考虑负载电流镜和差分输出对各±2%的失配时,该基准源的输出电压波动峰-峰值为0.31mV．与未应用斩波调制的带隙基准源相比,相对精度提高了约86倍．当温度在0℃到80℃变化时,该基准源的温度系数小于12×10^-6/℃．采用0.25μm 2P5M CMOS工艺实现的版图面积为0.3mm×0.4mm．     

恒流LDO型白光LED驱动芯片的设计研究

完成了一种具有极低脱落电压(LDO)的白光LED恒流驱动芯片的设计．利用一级温度补偿和二次比例电阻分压技术在内部集成了0.75V带隙基准源,可在2.7V到7.0V的工作电压范围内提供350mA的恒定驱动电流．当环境温度从-10℃到100℃变化时,驱动电流变化小于5.06%;电源电压有±10%跳变的情况下,驱动电流变化小于±0.8%;最小脱落电压可达120mV;控制电路功耗小于1.75mW,整个电路转换效率可达75%．     

一种高精度低温漂带隙基准源的设计

该文参考了带隙基准电压源领域的现阶段技术,结合自偏置共源共栅电流镜以及适当的启动电路、补偿电路,设计了一种高精度、低温漂的多输出带隙基准电路。首先简述了传统带隙电压基准的基本原理,然后详细阐述了具体的各电路设计过程。该基准电压源可广泛应用于电源管理芯片等对能耗要求极高的芯片中。     

High voltage detection circuit for power over the ethernet

A novel high voltage detection circuit with a high accuracy and low temperature coefficient for Power over the Ethernet (PoE) application is presented. The proposed detection circuit uses a bandgap comparator to detect the input voltage without an extra comparator and a voltage reference circuit, which reduces the chip area and detection time. In order to overcome the effect of the Ethernet resistor and avoid the circulating change of the detection circuit between the detection state and classification state, the proposed circuit uses a feedback circuit to realize the hysteresis function. The proposed detection circuit is implemented in 0.5μm65 V BCD process which occupies an active area of 590μm×310 μm. The measured results show that the temperature coefficient of the threshold voltage is 26.5×10^-6／℃ over the temperature range of -40℃ to 125℃. According to the measured results of 20 chips, the average value of the threshold voltage is 11.9V±0.25V, with a standard deviation of 0.138V.     

Design of a trimmed current reference with a low temperature drift

Component tolerances and mismatches due to process variations severely degrade the performance of bandgap reference circuits. Based on device mismatch models, a current reference I_ref with adjustable output current from 15μA to 80μA is designed. A compensated circuit is used to reduce the temperature drift. To achieve more accurate current reference, an 8bit bi-directional trimming array with 127 current levels is proposed. This digitally programmable array is binary weighted for accuracy and flexibility. Simulation shows that the temperature coefficient is 26ppm/℃ over the wide range of -40℃ to 120℃when the output current is 15μA. Based on the CMOS 0.13μm technology, the measurement results show that the trimmed range and precision for current reference are -14.3％·I_ref～14.3％·I_ref and 0.11％·I_ref, respectively. The circuit could be applied to high precision A/D and D/A converters.     

Low-offset high-PSRR bandgap voltage reference

Based on the problem that the accuracy of the bandgap affects the performance of the integrated circuit, a novel BGR (bandgap voltage reference) is proposed. It utilizes a feedback compensation network to enhance PSRR and reduce the offset voltage, which improves the system stability and precision. Cadence spectre simulation has been done by the SMIC 018μm 1.8V CMOS process for validation. The results show that the achieved temperature coefficient is 34.6×10^-6/℃ over -30℃ to 100℃ and that the PSRR is -63.5dB at a low frequency. The power assumption is only 1.5μW. The circuit is suitable for a low-voltage low-power energy harvesting system.     

Design of a low temperature coefficient bandgap reference with a wide temperature range

In order to meet the requirements of different applications and markets for the accuracy and reliability of IoT chips,a low temperature coefficient bandgap reference with a wide temperature range is proposed.On the basis of the traditional Banba bandgap reference structure,the circuit utilizes high-order temperature compensation technology and piecewise temperature compensation technology to improve the curvature of the output reference voltage.The temperature coefficient of the circuit is reduced.At the same time,the operating temperature range of the circuit is extended.The circuit performances are verified in the TSMC 180 nm CMOS process.Test results show that the temperature coefficient of the circuit is as low as 7.2×10^-6/℃ in the range of-40 ℃ to 160 ℃.The power supply rejection ratio at a low frequency is -48.52 dB.The static current under the 1.8 V power supply voltage is 68.38 μA,and the core area of the chip is 0.025 mm².     

非线性补偿的低温漂低功耗CMOS带隙基准源的设计

设计了一种基于电流模式的具有非线性补偿的低温漂低功耗带隙基准电压源,在传统电路的基础上增加一个三极管和两个电阻达到对双极型晶体管的发射结电压VBE中与温度相关的非线性项的补偿。电路采用CSMC0.5μmDPTM CMOS工艺制造。该电路结构简单,在室温下的输出电压为1.217V,在?40℃～125℃的范围内温度系数为4.6ppm/,℃在2.6～4V之间的电源调整率为1.6mV/V。在3.3V的电源电压下整个电路的功耗仅为0.21mW。     

基于同步补偿法的精密温度测控系统设计

设计了一种高精度温度测控系统。在恒流源测温电路中接入基准电阻作为系统测温的零度基准,放大电路对基准电阻与铂电阻两端的电压差进行放大;采用同步补偿法,在测温电路中接入采样电阻以获取A/D转换所需的参考电压,消除了恒流源电流的波动对系统测温性能的影响;通过分段线性化的方法对铂电阻测温的非线性进行补偿。基于MAX1968构建了高集成度的TEC驱动电路,采用增量式PID控制算法实现高精度的温度控制。实验结果表明,系统测温标准差为0.024℃,控温精度为±0.119℃。