新型SiO2栅介质非晶硅薄膜晶体管室温红外探测器

对用作室温红外探测敏感单元的非晶硅薄膜晶体管进行了研究，提出了一种新型SiO2栅介质非晶硅薄膜晶体管室温红外探测器。该探测器的基本工作机理与传统的SiNx栅介质薄膜晶体管相类似，但在器件性能方面不仅具有较高的响应度，而且具有更好的温度稳定性；在制作工艺方面具有更高的工艺重复性和栅介质淀积的均匀性。     

用于室温红外探测的新型非晶硅薄膜晶体管

研究了用于室温红外探测的非晶硅薄膜晶体管。分别从理论和实验角度对非晶硅薄膜晶体管的沟道电流随着宽长比的线性变化进行了分析验证。理论分析和实验结果表明,增大晶体管的宽长比不会影响沟道电流温度系数,但可以显著改善探测器的探测率,从而为a2SiTFT红外探测器的优化设计指明了方向。     

用于红外探测的非晶硅薄膜晶体管

非晶硅薄膜晶体管由于其较高的沟道电流温度系数而被用于非致冷型红外探测器.在工艺参数仿真的基础上成功地研制了离子注入型背栅非晶薄膜晶体管,并得到了典型的输出特性.制作出的晶体管具有较高的沟道电流温度变化系数,而且制作过程简单,并能与常规IC工艺兼容,制作温度不超过300 ℃.     

非晶硅薄膜晶体管室温红外探测器的优化设计

介绍了基于非晶硅薄膜晶体管的室温红外探测器的基本特征及性能指标,对晶体管宽长比对探测器性能的影响进行了理论分析,分析表明,提高晶体管的宽长比可以改善探测器的探测率。为了克服传统微桥结构室温红外探测器成品率低的不足,提出了一种新的热绝缘材料,并将该材料应用到了非制冷红外探测器中,实际制备了探测器单元,对该材料的热绝缘能力进行了验证。     

非晶硅薄膜晶体管室温红外探测器的优化设计

介绍了基于非晶硅薄膜晶体管的室温红外探测器的基本特征及性能指标,对晶体管宽长比对探测器性能的影响进行了理论分析,分析表明,提高晶体管的宽长比可以改善探测器的探测率.为了克服传统微桥结构室温红外探测器成品率低的不足,提出了一种新的热绝缘材料,并将该材料应用到了非制冷红外探测器中,实际制备了探测器单元,对该材料的热绝缘能力进行了验证.     

非晶硅薄膜晶体管室温红外探测器的优化设计

介绍了基于非晶硅薄膜晶体管的室温红外探测器的基本特征及性能指标，对晶体管宽长比对探测器性能的影响进行了理论分析，分析表明，提高晶体管的宽长比可以改善探测器的探测率。为了克服传统微桥结构室温红外探测器成品率低的不足，提出了一种新的热绝缘材料，并将该材料应用到了非制冷红外探测器中，实际制备了探测器单元，对该材料的热绝缘能力进行了验证。     

有机介质层铟锌氧化物薄膜晶体管

利用直流磁控溅射方法在玻璃基板上室温制备非晶铟锌氧化物半导体薄膜,薄膜表面平整。采用旋涂法室温制备聚四乙烯苯酚有机介质层。以铟锌氧化物薄膜作为沟道层、聚四乙烯苯酚作为介质层,成功制备了顶栅结构的薄膜晶体管。测试结果表明,所制备的薄膜晶体管具有饱和特性且为耗尽工作模式,薄膜晶体管的阈值电压为3.8V,迁移率为25.4cm2.V-1.s-1,开关比为106。     

低温氢化非晶硅薄膜晶体管研究

低温薄膜晶体管(TFT)的研究是开发大面积柔性衬底集成电路的基础.采用底栅TFT结构并入刻蚀阻挡层和钝化保护层,通过工艺参数和工艺流程的设计,研制了100℃低温氢化非晶硅TFT.实验对氢化非晶硅活性层、氮化硅介质层薄膜以及TFT特性进行了测试.所研制的低温TFT导通电流与截止电流之比高达106,场效应电子迁移率为0.825 cm2/Vs,表明适于柔性衬底工艺的100℃低温TFT得到了有效实现.     

用于红外探测的掺硼非晶硅薄膜电阻的热电特性研究

详细研究了等离子增强型化学气相沉积（PECVD）制作的掺硼非晶硅薄膜电阻的电阻率随各种制备条件的变化特性和它的热电特性,制作出了高灵敏度的适于作室温红外探测器敏感元件的掺硼a—Si薄膜电阻。制作的非晶硅电阻室温300K下的电阻温度系数（TCR）高达2．56％／℃,且制作工艺简单,与常规工艺兼容性好。     

金属—非晶硅锗合金肖特基势垒在玻璃基底红外光电子集成电路中的应用

近年来,有许多利用非晶硅锗合金(a-Si_(l-x)Ge_x·H)作为长波长光探测器材料的研究报导.p-i-n结构的a-SiGe∶H二极管已成功地用于检测红外光.这表明采用非晶硅薄膜晶体管工艺,有可能在玻璃基底上制作红外光电子集成电路.在我们对非晶硅光传感器的研究中,肖特基势垒二极管的性能优于p-i-n结构,它快速响应、制造简单、可靠性高。这促使我们开展对a-Si_(l-x)Ge_x∶H红外肖特基势垒探测器的研究.     

Hydrogenated amorphous silicon thin-film transistor on plastic with an organic gate insulator

We developed a high-performance, hydrogenated amorphous silicon thin-film transistor (a-Si:H TFT) on plastic substrate using an organic gate insulator. The TFT with a silicon-nitride (SiN/sub x/) gate insulator exhibited a field-effect mobility of 0.3 cm/sup 2//Vs and a threshold voltage of 5 V. On the other hand, an a-Si:H TFT with an organic gate insulator of BCB (benzocyclobutene) has a field-effect mobility of 0.4 cm/sup 2//Vs and a threshold voltage of 0.7 V. The leakage currents through the gate insulator of an a-Si:H TFT with an organic gate insulator is about two orders of magnitude lower than that of an a-Si:H TFT with a SiN/sub x/ gate insulator.     

Hydrogenated amorphous silicon thin-film transistor with a thingate insulator

Thinning the gate insulator in an hydrogenated amorphous silicon thin-film transistor (a-Si:H TFT) has been studied in a coplanar structure. The threshold voltage decreases with decreasing gate insulator thickness without changing the field effect mobility significantly. The reduction in the threshold voltage is due to the decrease in the charge traps in the SiN_x and in its film thickness. The coplanar a-Si:H TFT with a gate insulator thickness of 35 nm exhibited a field effect mobility of 0.45 cm²/Vs and a threshold voltage of 1.5 V. The thickness of the gate insulator can be decreased in the coplanar a-Si:H TFTs because of the planarized gate insulator     

Al栅a—Si TFT栅绝缘膜研究

Ａｌ栅可明显降低ＡＭ－ＬＣＤ中ａ－Ｓｉ ＴＦＴ矩阵的栅总线电阻及栅脉冲信号延迟，有利于提高高密显示屏的开口率与图像质量。本文详细分析了Ａｌ栅的阳极氧化技术，获得了适于ａ－Ｓｉ ＴＦＴ复合栅的Ａｌ２Ｏ３栅绝缘材料。     

Thermal Behavior of Amorphous Silicon Thin Film Transistor and Its Application to Micromachined Uncooled Infrared Sensors

This work reports a new uncooled infrared sensor based on amorphous silicon thin film transistors (a-Si TFTs). The temperature coefficient of channel current (TCC) of the a-Si TFT is given. Analysis shows that the a-Si TFT working in the saturation region is preferred for the sensitive element with a TCC value of 3.8-6.0 %/K. The a-Si TFT is placed on a suspended microbridge to reduce the thermal conductance by using micro-electro-mechanical system (MEMS) technology. The a-Si TFT-based IR sensor with a monolithic architecture is fabricated. Preliminary experimental results show that a responsivity of 40.8 kV/W, a thermal response time of 5.5 ms and a NETD of 90 mK are achieved.     

Hydrogen dilution effect on the properties of coplanar amorphoussilicon thin-film transistors fabricated by inductively-coupled plasmaCVD

The electrical and optical properties of the hydrogenated amorphous silicon (a-Si:H) films deposited by inductively-coupled plasma (ICP) chemical vapor deposition (CVD) with a variation of H₂ flow rate have been studied. The photosensitivity of a-Si:H is ~10⁷ when the H₂/SiH₄ ratio is between 3 and 8. With increasing H₂/SiH₄, the SiH₂ mode infrared absorption has a minimum at a H₂/SiH₄ ratio of 8. Coplanar a-Si:H thin-film transistors (TFT's) were fabricated using a triple layer of thin a-Si:H, silicon-nitride, and a-Si:H deposited by ICP-CVD using ion doping and low resistivity Ni silicide. After patterning the thin a-Si:H/silicon-nitride layers on the channel region, the gate and source/drain regions were ion-doped and then heated at 230°C to form Ni silicide layers. The low resistive Ni silicide formed on the a-Si:H reduces the offset length between gate and source/drain, leads to a coplanar a-Si:H TFT. The TFT exhibited a field effect mobility of 0.6 cm²/Vs and a threshold voltage of 2.3 V at the H₂/SiH₄ ratio of 8. The effect of H₂ dilution in SiH₄ on the coplanar a-Si:H TFT performance has been investigated. We found that the performance of the TFT is the best when the SiH₂ mode density in a-Si:H is the minimum. The coplanar TFT is very suitable for large-area, high density TFT displays because of its low parasitic capacitance between gate and source/drain contacts     

不同双栅极设计对a-Si:H TFT特性影响

本实验于原有的单底栅a-Si TFT产品结构下,通过增加不同的顶栅极设计方式(不同a-Si覆盖比例、不同沟道几何形貌、不同沟道W/L比例)来研究双栅极设计对a-Si TFT特性的影响。实验结果显示双栅极a-Si TFT比现行单底栅a-Si TFT可以提升I_on 7%、降低SS 3%、同时对I_off以及TFT稳定性影响不明显,显示双栅极a-Si TFT设计结构具有在不提高成本以及不变更工艺流程下,达到整体提升TFT特性的效果。顶栅极 TFT 特性不如底栅极,推测为a-Si/PVX界面不佳使得电子导通困难导致,未来可以借由改善a-Si/PVX界面工艺提升顶栅极TFT特性。     

Application of liquid phase deposited silicon dioxide tometal-oxide-semiconductor capacitor and amorphous silicon thin-filmtransistor

Liquid phase deposited silicon dioxide (LPD-SiO₂) is applied to crystalline Si metal-oxide-semiconductor (MOS) capacitor as the gate insulator. It is demonstrated that slow states exist at the Si/SiO₂ interface which cause hysteresis in the capacitance-voltage (C-V) characteristics. These slow states can be removed effectively by post-metallization-anneal. By means of C-V measurement and infrared absorption spectroscopy, it is concluded that the slow states are originated from the residual water or hydroxyl molecules in LPD-SiO₂. The LPD-SiO₂ is also applied to fabricate amorphous silicon (a-Si:H) thin film transistor (TFT) based on a new self-aligned process. The performance of this device is comparable to those of thin film transistors employed other kinds of SiO₂, i.e., thermal, plasma, vacuum evaporation, etc., as the gate insulator. The bias-stress measurement shows that the threshold voltage shift is dominated by charge trapping in the gate insulator     

A high-performance polycrystalline silicon thin film transistorwith a silicon nitride gate insulator

We have fabricated a high performance polycrystalline silicon (poly-Si) thin film transistor (TFT) with a silicon-nitride (SiN_x ) gate insulator using three stacked layers: very thin laser of hydrogenated amorphous silicon (a-Si:H), SiN_x and laser annealed poly-Si. After patterning thin a-Si:H/SiN_x layers, gate, and source/drain regions were ion-doped and then Ni layer was deposited. This structure was annealed at 250°C to form a NiSi silicide phase. The low resistive Ni silicides were introduced as gate/source/drain electrodes in order to reduce the process steps. The poly-Si with a grain size of 250 nm and low resistance n⁺ poly-Si for ohmic contact were introduced to achieve a high performance TFT. The fabricated poly-Si TFT exhibited a field effect mobility of 262 cm²/Vs and a threshold voltage of 1 V