数字图像采集接口电路设计

本文介绍了两种用于嵌入式系统的数字图像采集接口方法,I／O接口和内存直接写入。I／O接口方法可以简化接口电路设计,减少系统资源;直接写入内存法可以在不需要处理器干预的情况下,直接将图像数据写入系统存储区内,实现高速图像采集。     

多核处理器系统I/O访存优化研究

本文提出了一种多核处理器自适应I/O直接缓存访问(ADCA)的方法以提升I/O访存的性能,降低对其他程序的影响。与传统直接缓存访问(DCA)不同的是,该方法利用了LRU栈特性,通过采样辅助标签目录的方式动态调整DCA可使用的cache空间,同时对I/O数据的替换和写内存策略进行优化。实验结果表明,与DCA方式相比,该方式使得I/O带宽提升了大约10%,而与SPEC和采用直接内存访问(DMA)方式的网络测试程序同时运行相比,SPEC定点和浮点性能分别提升了11. 5%和8. 9%。     

龙芯2号原型系统北桥的设计与实现

针对龙芯2号原型系统中主要I/O数据通路上数据流的特点,设计并实现了一款适用于龙芯2号原型系统的北桥。在此北桥的设计中提出并实现了一种用于外部设备互连(PCI)主桥(PCI host bridge,PHB)的数据传输优化方法,这种方法通过自适应的写合并、PCI写数据及时收集重打包和采用固定开销的分阶段PCI读数据预取策略,提高了PCI主桥中数据传输的效率。实验结果表明,所设计的北桥可以充分的利用PCI总线带宽,并且在处理PCI总线上的直接内存访问(DMA)读数据流和处理器更新显卡显存的PCI写数据流时相对同类系统而言具有明显的性能优势。     

CREATOR快捷中控主机新品CR-CPSIII

可编程控制主机CR-CPSIII采用1U机箱设计,是CR-PGM的迷你版,在原有功能的基础上加以优化。CR-CPSIII采用主频高达210MHz的32位内嵌式处理器,内置8M超大内存,2M闪存,可高速运算 复杂的逻辑指令，不仅性能非常稳定，功能也更加强大。CR-CPSIII前后板各提供一USB接口更方便数据的下载。内置4路数字I／O端口；     

NJ-GPCA:一种面向并行空间计算的高效数据访存策略

针对并行矢量空间叠加分析中存在的I/O性能差及并行算法调度效率低的缺陷,提出了"去"归并通用并行计算架构(NJ-GPCA)。该架构首先基于内存数据库Redis设计内存矢量空间数据模型;其次通过数据预处理以及任务分发技术,减少进程等待,提高I/O性能;最后重新进行任务分配以及规划进程调度,避免结果数据归并收集,使得并行叠加分析算法归并收集阶段的时间复杂度由O(nlogn)降低到O(n)。实验结果表明,该方法对真实地理数据下的并行叠加分析操作,I/O时间至少减少75%,对于提高算法整体性能有明显效果。     

苹果中国发布最新一代iMac台式一体电脑

2011年5月3日，苹果公司正式发布了全新一代的iMac一体电脑。这些产品新一代四核处理器、功能强大的全新图形处理器、突破性高速Thunderbolt I／O技术和全新FaceTimeHD摄像头．值得关注。     

Oracle数据库系统的优化与应用研究

如何优化数据库性能直接关系到应用系统的运行效率,本文以数据库性能优化的基本原则为出发点,阐述了在数据库设计阶段如何避免竞争和如何优化数据访问,在数据库运行阶段如何从操作系统和数据库实例级别上调整内存和I／O来达到数据库性能优化的各种技术。     

一种大规模数字I／O通道的扩展方法

针对控制系统中普通数字I/O卡的通道数无法满足大规模数字I／O要求的问题，提出一种数字I/O通道扩展方案，并设计了一种32路光电隔离多通道数字I/O板，通过一个简单实例说明了这种扩展方案的具体实施，并证实其有效性。     

单片计算机在电影自动放映中的应用

单片计算机，通常称为单片机或微处理器，它是能实现各种自动控制的器件，而且性能价格比很高。其片内有随机存储器RAM、程序存储器E—PROM、可快速擦写的Flash ROM，还有掉电保护的随时可改写的E^2PROM。片内设有驱动电流较高的I／O口，驱动电流为20mA，有些型号高达40mA。有些型号片内集成了看门狗、A／D转换器、     

谷歌眼镜不为人知的细节

谷歌周三展示了谷歌眼镜的功能,宣布已经开始接受预订,并公布了这款产品的详细信息。以下为该产品的详细信息汇总:——该设备包含内存、处理器、侧面的触控板、拍照按钮、麦克风、摄像头、扬声器以及各种传感器,比如加速计、指南针和陀螺仪等。——"探索者"(Explorer)版已经以1500美元的价格接受美国I/O与会者的预订,大概已经有1000人预订。     

Focal-plane processing architectures for real-time hyperspectral image processing

Real-time image processing requires high computational and I/O throughputs obtained by use of optoelectronic system solutions. A novel architecture that uses focal-plane optoelectronic-area I/O with a fine-grain, low-memory, single-instruction-multiple-data (SIMD) processor array is presented as an efficient computational solution for real-time hyperspectral image processing. The architecture is evaluated by use of realistic workloads to determine data throughputs, processing demands, and storage requirements. We show that traditional store-and-process system performance is inadequate for this application domain, whereas the focal-plane SIMD architecture is capable of supporting real-time performances with sustained operation throughputs of 500-1500 gigaoperations/s. The focal-plane architecture exploits the direct coupling between sensor and parallel-processor arrays to alleviate data-bandwidth requirements, allowing computation to be performed in a stream-parallel computation model, while data arrive from the sensors.     

Performance analysis of a separate address/data bus multiprocessor system

Abstract

This paper presents a performance model of a special shared bus multiprocessor system, that features: (1) separate address‐bus and data‐bus with split transaction, pipelined cycle; (2) two‐level cache structure; and (3) multiple main memory and I/O modules. Accessing conflicts in these subsystems, maintaining shared data and DMA transfer between memory and I/O subsystems are also considered in the model. The representation for the complex behavior of a whole multiprocessor system distinguishes the model from others that present only one major subsystem. The performance model can be used not only to assist in evaluating the architectural design of aparticular system, but also directly utilized to identify subsystem bottlenecks and their causes in order to make performance improvements. Results show that: (1) the values of some key design parameters, such as cache line size and data‐bus width that yield the best throughput, are dependent on the performance of subsystems; (2) choosing the data‐bus width at one‐half of cache line size can achieve the lowest access time in the shared bus; (3) using cache‐to‐cache transfer protocol may prevent performance degradation caused by maintaining shared data; and (4) the activity of DMA transfer may significantly affect system throughput and should be included in a performance model of multiprocessor systems.     

Optimal processors for images with an arbitrary number of gray levels

We present a new group of processors, optimal in a maximum-likelihood sense, for target location in images with a discrete number of gray levels. The discrete gray-level distribution can be of any arbitrary form. We compare the performance of the processor derived for five discrete levels with the performance of a processor derived for a continuous Gaussian distribution and show that there are cases when only the processor derived for discrete levels will exhibit satisfactory performance. We give an explanation of this difference based on moment analysis and show how the correlation orders are related to statistical moments of the input scene.     

基于FPGA的高动态范围红外图像细节增强算法

以非锐化掩膜算法为技术框架,提出了一种基于引导滤波器、γ变换的图像细节增强算法;使用VHDL语言设计出一种新型的引导滤波器架构,并且在以CYCLONE Ⅲ为核心控制器的硬件平台上对算法进行了工程实现。核心处理器的逻辑和内存资源占用量分别为15%和40%;在100MHz主时钟时,处理延时小于300μs;使用低端的处理器,即可满足工程需求。通过多幅不同场景红外图像测试对比,结果表明算法处理效果明显,可有效地实现细节增强。     

Using rainbow net simulation to measure fault tolerance in a multiprocessor

The Rainbow net simulation technique is applied to modelling the impact of system load and fault handling on the availability of a fault-tolerant multiprocessor architecture. Rainbow nets are described along with the motivation for creating this modelling technique. A Rainbow net fault-handling model is created for the fault-tolerant multiprocessor architecture and the topology is shown to remain constant in size, independent of the number of processor, memory and I/O elements configured in the system. Simulation is performed with a varying load in terms of the number of active jobs the system must support. Results are given showing how the fault-tolerant capability varies with load. Two new metrics for evaluating fault tolerance are introduced; namely full fault-tolerability and partial fault-tolerability. They are based on simple observations in the model.     

Maneuvering target tracking in the presence of complicated measurement noises

Abstract

In modern radar tracking systems, measurement noise is significantly correlated when the measurement frequency is high enough. The problem of maneuvering target tracking in the presence of complicated measurement noise is considered in this paper. The measurement noise is modeled as the sum of a high‐order autoregressive process and a white process. This noise can be decorrelated by including the noise‐correlation variables in the target state. The theoretical analysis of tracking performance is derived. If some of the parameters (including the noise‐correlation parameters) are unknown, these unknown parameters can be estimated adaptively using a modified innovation correlation method. This parameter estimation method is very useful when the measurement noise can be modeled as the sum of a first‐order Markov process and a white process.     

应用PCI总线的音频处理系统的设计

讨论了一种关于音频调理的方法，由于该系统对传输要求比较高，所以系统的传输速度和效率都是很重要的性能指标，在系统的性能指标基础上，选定了PCI总线接口的方案，为简化电路，论文采用PLX公司的PCI9054芯片实现PCI接口，用FPGA实现FIFO数据缓存和本地总线控制逻辑，使通过音频处理后的声音信号通过声音编解码器出去。最后编写了该系统的驱动程序以及应用程序，达到了预期效果。     

Remoting field bus control by means of a PCI Express-based optical serial link

A major evolution moved into the I/O architecture of modern computers, where the multi-drop buses have been replaced by a network of point-to-point links. Besides the increased throughput and the inherent parallelization of the data flows, the serial nature of those links and the packet-based protocols allow an easy geographical decoupling of a peripheral device. In the context of the LINCO project, we investigated the possibility of using an optical physical layer for the PCI Express, and we built a bus adapter which can bridge, through such a link, remote buses (>100 m) to a single-host computer without even the need of a specialized driver, given the legacy PCI compatibility of the PCI Express hardware. By the choice of suitable components and dedicated control logic, the adapter has been made tolerant to harsh environmental conditions, like strong magnetic fields or radiation fluxes, that the data acquisition needs of high-energy physics experiments often require.     

Bioinspired interactive neuromorphic devices

The performance of conventional computer based on von Neumann architecture is limited due to the physical separation of memory and processor. By synergistically integrating various sensors with synaptic devices, recently emerging interactive neuromorphic devices can directly sense/store/process various stimuli information from external environments and implement functions of perception, learning, memory, and computation. In this review, we present the basic model of bioinspired interactive neuromorphic devices and discuss the performance metrics. Next, we summarize the recent progress and development of bioinspired interactive neuromorphic devices, which are classified into neuromorphic tactile systems, visual systems, auditory systems, and multisensory system. They are discussed in detail from the aspects of materials, device architectures, operating mechanisms, synaptic plasticity, and potential applications. Additionally, the bioinspired interactive neuromorphic devices that can fuse multiple/mixed sensing signals are proposed to address more realistic and sophisticated problems. Finally, we discuss the pros and cons regarding to the computing neurons and integrating sensory neurons and deliver the perspectives on interactive neuromorphic devices at the material, device, network, and system levels. It is believed the neuromorphic devices can provide promising solutions to next generation of interactive sensation/memory/computation toward the development of multimodal, low-power, and large-scale intelligent systems endowed with neuromorphic features.