软件体系结构的CDT模型

文章采用以范畴理论为基础的CDT(范畴数据类型)模型给出了体系结构的形式化定义。在此基础上对软件体系结构的重用进行了理论分析与探讨，这为软件体系结构的进一步研究提供了坚实的理论基础．     

存储器类型的CDT构造Ⅱ

目的 CDT(范畴数据类型)是以范畴理论为基础的并行计算模型，本文对存储器类型的CDT构造进行深入的探讨。方法 采用构造方法Ⅱ实现了存储器类型CDT。结果 通过例子比较了与构造方法Ⅰ的区别．同时进一步详细论述了两种构造方法的优劣性，而它们之间的关系可以采用类似文[8]的方式得到。     

基于同态的软件重用技术度量

针对现有重用技术不便于解决的重用问题，采用基于同态的重用技术，研究了问题表示的同态重用。在此基础上提出一种同态重用度的概念，通过计算同态重用度的方法，人们可以在编写程序前就对已有程序的重用程度给出评价，从而有目的有选择地进行软件重用，这样就能比较系统、广泛地在软件开发中应用重用技术。     

37cm0.39CDT荫罩母版合成中几个问题的探讨

本文系统的分析了在３７ｃｍ０．３９ＣＤＴ荫罩母版研制了所遇到的几个问题，论述了它们对母版合成的影响，提出了原稿与生干版之间垫透明介质层，利用点光源改变间距等行之有效地解决办法，成功地进行了３７ｃｍ０．３９ＣＤＴ荫罩母版的合成。     

范畴数据类型(CDT)构造的基本原理

范畴数据类型(CDT)是以范畴理论为基础来讨论数据类型的构造及应用,它是抽象数据类型的一种推广,在并行计算的理论研究中有着重要的地位.文章对范畴数据类型(CDT)构造的基本原理作了深入探讨,并采用了一种新的方法实现了CDT同态的因子分解定理,得到了CDT构造中某些重要的性质和CDT因子分解定理.     

存储器类型的CDT构造Ⅰ

目的存储器类型是计算机中十分重要的数据类型，因而对其进行CDT构造具有十分重要的意义。方法采用了构造方法I给出存储器类型的构造因子。结果得到了存储器类型的CDT(范畴数据类型)，同时讨论了基于构造方式I下存储器类型CDT的映射与归约以及存储器CDT变换的因子分解定理。并用例子详细说明了构造的实质。     

基于指令并行的软件流水线研究

文章在分析数字信号处理器指令并行操作的基础上，研究了软件流水线，探讨了软件流水线的产生条件并分析了其性能，并结合TD-SCDMA移动通信用户设备(UE)研究项目，分析了软件流水线的设计与应用。     

同态密码理论与应用进展

随着云计算、云存储等各类云服务的普及应用,云环境下的隐私保护问题逐渐成为业界关注的焦点,同态密码成为解决该问题的关键手段,其中,如何构造高效的全同态加密方案是近年来同态加密研究的热点之一。首先,该文介绍了同态密码的发展情况,从不同角度对同态加密方案进行了分类分析,着重描述了可验证全同态加密方案的研究进展。通过分析近年来公开的同态加密领域知识产权文献,对同态加密在理论研究和实际应用中所取得的进展进行了归纳总结。其次,对比分析了目前主流全同态加密库Helib, SEAL以及TFHE的性能。最后,梳理了同态加密技术的典型应用场景,指出了未来可能的研究与发展方向。     

基于密文操作的云平台数据保护技术研究

针对目前的加密算法无法解决云存储平台中数据的实用性与安全性的平衡问题,提出了可识别权限的整数同态加密(HEIP)算法并对方案的安全性、时间复杂度和算法效率进行了分析。然后在整数同态加密方案的基础上,同时结合实际的云存储应用场景设计了二级代理的同态加密云存储系统,并给出了关键模块的实现方法。最后通过实验证明了云存储平台的有效性、两级解密架构的安全性以及同态计算模式的正确性。     

基于带宽请求预测和云资源预留的视频移植策略

随着云计算和大数据处理的飞速发展,同态加密和安全多方计算问题引起了广泛关注。分析了ElGamal的同态特性,针对协议设计需要,设计了ElGamal变体加密方案,使其满足加法同态和常数乘法同态。在半诚实模型下,基于这个变体提出了过私有点直线方程同态计算协议,并分析了协议的正确性、安全性、计算和通信复杂性,同时将该协议的应用范围扩展到安全两方线段求交协议等。与解决同类几何问题的协议相比,未采用基于不经意传输和百万富翁协议设计思路,而是基于同态加密体制提出了一种安全两方计算协议,提高了该类协议的执行效率,降低了通信负担。     

Parallel Environment with High Accuracy for Resolution of Numerical Problems

In this paper we describe a high performance environment, like cluster computers, with high accuracy obtained by use of C-XSC library. The C-XSC library is a (free) C++ class library for scientific computing for the development of numerical algorithms delivering highly accurate and automatically verified results by use of the interval arithmetic. These calculus in high accuracy must be available for some basic arithmetic operations, mainly the operations that accomplish the summation and dot product. Because of these aspects, we wish to use the high performance through a cluster environment where we have several nodes executing tasks or calculus. The communication will be done by message passing using the MPI communication library. To obtain the high accuracy in this environment extensions or changes in the parallel programs had done to guarantee that the quality of final result done on cluster, where several nodes collaborate for the final result of the calculus, maintain the same result quality obtained in one sequential high accuracy environment. To validate the environment developed in this work we done basic tests about the dot product, the matrix multiplications, the implementation of interval solvers for banded and dense matrices and the implementation of some numeric methods to solve linear systems with the high accuracy characteristic (some of the methods implemented are used in real life applications like hydrodynamic, agriculture and power electric systems). With these tests we done analysis and comparisons about the performance and accuracy obtained with and without the use of C-XSC library in sequential and parallel programs. With the implementation of these routines and methods will be open a large research field about the study of real life applications that need during their resolution (or in part of their resolution) to calculate arithmetic operations with more accuracy than the accuracy obtained by the traditional computational tools. Our software     

Image source identification with known post-processed based on convolutional neural network

Image source identification is important to verify the origin and authenticity of digital images. However, when images are altered by some post-processing, the performance of the existing source verification methods may degrade. In this paper, we propose a convolutional neural network (CNN) to solve the above problem. Specifically, we present a theoretical framework for different tampering operations, to confirm whether a single operation has affected photo response non-uniformity (PRNU) contained in images. Then, we divide these operations into two categories: non-influential operation and influential operation. Besides, the images altered by the combination of non-influential and influential operations are equal to images that have only undergone a single influential operation. To make our introduced CNN robust to both non-influential operation and influential operation, we define a multi-kernel noise extractor that consists of a high-pass filter and three parallel convolution filters of different sizes. The features generated by the parallel convolution layers are then fed to subsequent convolutional layers for further feature extraction. The experimental results provide the effectiveness of our method.     

基于GPU的数学形态学运算并行加速研究

数学形态学运算是一种高度并行的运算,其计算量大而又如此广泛地应用于对实时性要求较高的诸多重要领域。为了提高数学形态学运算的速度,提出了一种基于CUDA架构的GPU并行数学形态学运算。文章详细描述了GPU硬件架构和CUDA编程模型,并给出了GPU腐蚀并行运算的详细实现过程以及编程过程中为充分利用GPU资源所需要注意的具体问题。实验结果表明,GPU并行数学形态学运算速度可达到几个数量级的提高。     

一种高效执行并行图像旋转的新方法

本文提出了一种在分布式并行机上有效地执行二维图像旋转的方法.算法的开发是在高级图像抽象的框架下进行的.文中阐述了利用在二维可分旋转技术的基础上新开发的高级抽象表达式,可以简捷地表示并行图像旋转,并可在分布式存贮并行体系结构上有效地执行.本文还对二维可分运算进行了误差分析,并提出了减小误差的补偿方案.     

Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors

Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence of instructions needed to emulate these complicated bit operations. As these bit manipulation operations are relevant to applications that are becoming increasingly important, we propose direct support for them in microprocessors. In particular, we propose fast bit gather (or parallel extract), bit scatter (or parallel deposit) and bit permutation instructions (including group, butterfly and inverse butterfly). We show that all these instructions can be implemented efficiently using both the fast butterfly and inverse butterfly network datapaths. Specifically, we show that parallel deposit can be mapped onto a butterfly circuit and parallel extract can be mapped onto an inverse butterfly circuit. We define static, dynamic and loop invariant versions of the instructions, with static versions utilizing a much simpler functional unit. We show how a hardware decoder can be implemented for the dynamic and loop-invariant versions to generate, dynamically, the control signals for the butterfly and inverse butterfly datapaths. The simplest functional unit we propose is smaller and faster than an ALU. We also show that these instructions yield significant speedups over a basic RISC architecture for a variety of different application kernels taken from applications domains including bioinformatics, steganography, coding, compression and random number generation.     

A flexible parallel architecture for relaxation labeling algorithms

The design of a flexible parallel architecture for both the discrete relaxation labeling (DRL) algorithm and the probabilistic relaxation labeling (PRL) algorithm is addressed. Through the analysis of parallelism in the computational models of both algorithms, the parallel execution of the algorithms on a flexible parallel architecture is presented. Three basic types of parallel operations are performed in the architecture: simultaneous, pipeline, and systolic. An illustrative example is used to show how the DRL algorithm can be executed on the parallel architecture. In doing so, the processing element (PE) organization and the combiner organization of the architecture are described. The same architecture with programmable functional units is shown to be able to execute the PRL algorithm, too. The performance comparisons between the proposed architecture and some other existing ones are also given     

Heuristic Search Space Generation for Maximum Clique Problem Inspired in Biomolecular Filtering

Biomolecular filtering, as a computing paradigm, consists essentially of two steps: (1) the codification of candidate solutions in DNA and (2) the removal of non-valid solutions by means of biochemical procedures. The sticker model makes use of this notion, defining simple bitwise operations over large sets of DNA-coded binary strings. A sticker machine is conceived as a robotic station automatizing sticker operations and thus, can be seen as an SIMD computer with a densely populated pool of data. In this paper, the maximum clique problem is tackled by harnessing the massive threading of the CUDA SIMT architecture to replicate the parallel strand filtering. The proposed heuristic relies on the sequential-and-progressive generation of partial search spaces for subsequent parallel filtering in GPU. Computational results over DIMACS benchmark set show that our approach is competitive, compared to a preceding similar work and to state-of-the-art branch-and-bound algorithms. Moreover, our approach is scalable and produces more than one solution for some instances. As far as we know, the number of found cliques has not been previously used as a reference point for this problem.     

An Efficient PAB‐Based Query Indexing for Processing Continuous Queries on Moving Objects

Existing methods to process continuous range queries are not scalable. In particular, as the number of continuous range queries on a large number of moving objects becomes larger, their performance degrades significantly. We propose a novel query indexing method called the projected attribute bit (PAB)‐based query index. We project a two‐dimensional continuous range query on each axis to get two one‐dimensional bit lists. Since the queries are transformed to bit lists and query evaluation is performed by bit operations, the storage cost of indexing and query evaluation time are reduced significantly. Through various experiments, we show that our method outperforms the containment‐encoded squares‐based indexing method, which is one of the most recently proposed methods.     

基于二维网孔互连网络的并行矩阵乘算法

矩阵乘法是数值分析领域中一种十分常用的基本运算，被广泛应用于模式识别、图像和信号处理。由于矩阵运算具有局部性、一致性的特点，特别适合用二维网孔并行计算机来实现。文章讨论了基于二维网孔互连网络的矩阵乘并行算法的实现，首先给出了一种正方网孔处理机阵列的并行算法，然后将其推广到长方网孔处理机阵列中。最后通过在LSMPP计算机的应用，证明算法是可行的、有效的。     

基于启发式调度的OpenFlow网络规则一致更新方案

针对OpenFlow网络在状态转换过程中会暂时性出现转发回路、路由黑洞和违反访问控制策略等问题,提出了一种基于启发式调度的规则一致更新方案.首先,设计基于谓词的更新分解算法,利用并行网络属性验证技术得到子更新依赖图;其次,采用任务图生成算法对子更新依赖图进行分割,降低更新调度的复杂度;之后,设计启发式更新调度算法,采用规则增删操作交替执行策略,减少交换机的规则存储开销,并通过建立更新实施和监听并发执行机制,提升更新效率.仿真实验从更新时间开销和更新过程中交换机规则存储开销两方面验证了方案的有效性.